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Internal Controller: Difference between revisions
From SnesLab
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=== References === | === References === | ||
# Figure 1-2-1 SA-1 Block Diagram on [https://archive.org/details/SNESDevManual/book2/page/n12 page 1-2-1 of Book II] of the official Super Nintendo development manual | # Figure 1-2-1 SA-1 Block Diagram on [https://archive.org/details/SNESDevManual/book2/page/n12 page 1-2-1 of Book II] of the official Super Nintendo development manual | ||
# [https://archive.org/details/SNESDevManual/book2/page/n13 page 1-2-2], lbid. | # 2.1.4 on [https://archive.org/details/SNESDevManual/book2/page/n13 page 1-2-2], lbid. | ||
[[Category:SA-1]] | [[Category:SA-1]] | ||
[[Category:Official Jargon]] | [[Category:Official Jargon]] | ||
Latest revision as of 06:59, 21 December 2023
The Internal Controller exists inside the SA-1. It is connected to these eight components:
- the 65c816 SA-1 CPU
- I-RAM
- Super MMC
- Arithmetic Circuit
- Character Conversion Circuit
- Variable-Length Bit Processing Circuit
- Timer Circuit
- DMA Circuit
References
- Figure 1-2-1 SA-1 Block Diagram on page 1-2-1 of Book II of the official Super Nintendo development manual
- 2.1.4 on page 1-2-2, lbid.