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SBK (Super FX): Difference between revisions
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!colspan="8"|Basic Info | !colspan="8"|Basic Info | ||
|+ | |+ | ||
|'''Addressing Mode''' | |||
|'''Opcode''' | |'''Opcode''' | ||
|'''Length''' | |'''Length''' | ||
| Line 8: | Line 9: | ||
|'''Cache Speed''' | |'''Cache Speed''' | ||
|+ | |+ | ||
|[[Implied]] (type 1) | |||
|90 | |90 | ||
|1 byte | |1 byte | ||
| Line 18: | Line 20: | ||
!colspan="9"|Flags Affected | !colspan="9"|Flags Affected | ||
|+ | |+ | ||
|B | |[[B Flag|B]] | ||
|[[ALT1]] | |[[ALT1]] | ||
|[[ALT2]] | |[[ALT2]] | ||
| Line 24: | Line 26: | ||
|[[Sign Flag|S]] | |[[Sign Flag|S]] | ||
|[[CY]] | |[[CY]] | ||
|Z | |[[Zero Flag|Z]] | ||
|+ | |+ | ||
|0 | |0 | ||
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|} | |} | ||
'''SBK''' is a [[Super FX]] instruction that uses [[ | '''SBK''' is a [[Super FX]] instruction that uses [[bulk processing]]. It stores the value in the [[source register]] to the address in the [[Ram Address Cache (Super FX)|ram address cache]]. | ||
The [[ALT0]] state is restored. | |||
The source register should be specified in advance using [[WITH]] or [[FROM]]. Otherwise, R<sub>0</sub> serves as the default. | |||
==== Syntax ==== | |||
<pre> | |||
SBK | |||
</pre> | |||
==== Example ==== | |||
Let: | |||
(70:3230h) = 51h | |||
(70:3231h) = 49h | |||
RAMBR = 70h | |||
After executing this program: | |||
LM R<sub>1</sub>, (3230h) | |||
INC R<sub>1</sub> | |||
SBK | |||
We have: | |||
R<sub>1</sub> = 4952h | |||
(70:3230h) = 52h | |||
(70:3231h) = 49h | |||
=== External Links === | === External Links === | ||
* Official Super Nintendo development manual on SBK: [https://archive.org/details/SNESDevManual/book2/page/n265 | * Official Super Nintendo development manual on SBK: 9.79 on [https://archive.org/details/SNESDevManual/book2/page/n265 page 2-9-109 of Book II] | ||
[[Category:ASM]] | [[Category:ASM]] | ||
| Line 44: | Line 69: | ||
[[Category:Data Transfer Instructions]] | [[Category:Data Transfer Instructions]] | ||
[[Category:One-byte Instructions]] | [[Category:One-byte Instructions]] | ||
[[Category:Expects Sreg/Dreg Prearranged]] | |||
Latest revision as of 05:18, 16 July 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | ROM Speed | RAM Speed | Cache Speed | ||
| Implied (type 1) | 90 | 1 byte | 3 to 8 cycles | 7 to 11 cycles | 1 to 6 cycles | ||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| B | ALT1 | ALT2 | O/V | S | CY | Z | ||
| 0 | 0 | 0 | . | . | . | . | ||
SBK is a Super FX instruction that uses bulk processing. It stores the value in the source register to the address in the ram address cache.
The ALT0 state is restored.
The source register should be specified in advance using WITH or FROM. Otherwise, R0 serves as the default.
Syntax
SBK
Example
Let:
(70:3230h) = 51h (70:3231h) = 49h RAMBR = 70h
After executing this program:
LM R1, (3230h) INC R1 SBK
We have:
R1 = 4952h (70:3230h) = 52h (70:3231h) = 49h
External Links
- Official Super Nintendo development manual on SBK: 9.79 on page 2-9-109 of Book II