We've just updated MediaWiki and its underlying software. If anything doesn't look or work quite right, please mention it to us. --RanAS
External Latch: Difference between revisions
From SnesLab
(created page) |
(bold external latch flag) |
||
| (5 intermediate revisions by the same user not shown) | |||
| Line 1: | Line 1: | ||
The '''EXTLATCH''' line connects pin 29 of the [[S-PPU2]] to JPIO7 on the [[Front Panel Daughterboard]]. | The '''EXTLATCH''' line connects pin 29 of the [[S-PPU2]] to JPIO7 on the [[Front Panel Daughterboard]], where it is called JPIO7. | ||
According to [[fullsnes]], it is the lightpen signal. | |||
There is also the '''external latch flag''', which is bit 6 of 213Fh. | |||
[[Category:SNES Hardware]] | [[Category:SNES Hardware]] | ||
[[Category:Traces]] | [[Category:Traces]] | ||
[[Category:Flags]] | |||
Latest revision as of 16:05, 8 July 2023
The EXTLATCH line connects pin 29 of the S-PPU2 to JPIO7 on the Front Panel Daughterboard, where it is called JPIO7.
According to fullsnes, it is the lightpen signal.
There is also the external latch flag, which is bit 6 of 213Fh.