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LDY: Difference between revisions
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{| class="wikitable" style="float:right;clear:right;width: | {| class="wikitable" style="float:right;clear:right;width:40%" | ||
!colspan="8"|Basic Info | !colspan="8"|Basic Info | ||
|+ | |+ | ||
| Line 7: | Line 7: | ||
|'''Speed''' | |'''Speed''' | ||
|+ | |+ | ||
| | |[[Immediate]] | ||
|A0 | |A0 | ||
|2 bytes | |2/3 bytes | ||
|2 cycles | |2 cycles* | ||
|+ | |+ | ||
| | |[[Absolute]] | ||
|AC | |AC | ||
|3 bytes | |3 bytes | ||
|4 cycles | |4 cycles* | ||
|+ | |+ | ||
| | |[[Direct Page Addressing|Direct Page]] | ||
|A4 | |A4 | ||
|2 bytes | |2 bytes | ||
|3 cycles | |3 cycles* | ||
|+ | |+ | ||
| | |[[Absolute Indexed by X]] | ||
|BC | |BC | ||
|3 bytes | |3 bytes | ||
|4 cycles | |4 cycles* | ||
|+ | |+ | ||
| | |[[Direct Page Indexed by X]] | ||
|B4 | |B4 | ||
|2 bytes | |2 bytes | ||
|4 cycles | |4 cycles* | ||
|} | |} | ||
{| class="wikitable" style="float:right;clear:right;width:30%" | {| class="wikitable" style="float:right;clear:right;width:30%" | ||
!colspan="9"|Flags | !colspan="9"|Flags Affected | ||
|+ | |||
|[[Negative Flag|N]] | |||
|[[Overflow Flag|V]] | |||
|[[M Flag|M]] | |||
|[[X Flag|X]] | |||
|[[Decimal Flag|D]] | |||
|[[I Flag|I]] | |||
|[[Zero Flag|Z]] | |||
|[[Carry Flag|C]] | |||
|+ | |+ | ||
|N | |N | ||
|. | |. | ||
|. | |. | ||
|. | |. | ||
|. | |. | ||
|. | |. | ||
|Z | |||
|. | |. | ||
|} | |} | ||
'''LDY''' (Load Y) is a 65x instruction that loads the [[Y index register]]. | '''LDY''' (Load Y) is a 65x instruction that loads a value into the [[Y index register]]. In [[immediate addressing]] only, LDY takes a total of 3 bytes when the index registers are 16 bits wide. | ||
==== Syntax ==== | |||
<pre> | |||
LDY #const | |||
LDY addr | |||
LDY dp | |||
LDY addr, X | |||
LDY dp, X | |||
</pre> | |||
==== Cycle Penalties ==== | |||
* In [[direct page addressing]] modes, LDY takes another extra cycle if the low byte of the [[direct page register]] is nonzero. | |||
=== See Also === | === See Also === | ||
* [[STY]] | |||
* [[LDA]] | * [[LDA]] | ||
* [[LDX]] | * [[LDX]] | ||
* [[TAY]] | |||
* [[TXY]] | |||
=== External Links === | === External Links === | ||
* [[Eyes & Lichty]] | * [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/n490 page 464] on LDY | ||
* [[Labiak]] | * [[Labiak]], [https://archive.org/details/Programming_the_65816/page/n161 page 151] on LDY | ||
* [[MCS6500 Manual]] | * 7.1 on [[MCS6500 Manual]], [https://archive.org/details/mos_microcomputers_programming_manual/page/n114 page 96] on LDY | ||
* [[Carr]] | * [[Carr]], [https://archive.org/details/6502UsersManual/page/n277 page 264] on LDY | ||
* [[Leventhal]] | * [[Leventhal]], [https://archive.org/details/6502-assembly-language-programming/page/n123 page 3-74] on LDY | ||
* snes9x implementation of LDY: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L817 | * snes9x implementation of LDY: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L817 | ||
* undisbeliever on LDY: https://undisbeliever.net/snesdev/65816-opcodes.html#ldy-load-index-register-y-from-memory | * undisbeliever on LDY: https://undisbeliever.net/snesdev/65816-opcodes.html#ldy-load-index-register-y-from-memory | ||
* Pickens, John. http://www.6502.org/tutorials/6502opcodes.html#LDY | |||
[[Category:ASM]] | [[Category:ASM]] | ||
[[Category:Group Three Instructions]] | [[Category:Group Three Instructions]] | ||
[[Category:Inherited from 6502]] | [[Category:Inherited from 6502]] | ||
[[Category:Load/Store Instructions]] | |||
Latest revision as of 06:32, 22 August 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Immediate | A0 | 2/3 bytes | 2 cycles* | ||||
| Absolute | AC | 3 bytes | 4 cycles* | ||||
| Direct Page | A4 | 2 bytes | 3 cycles* | ||||
| Absolute Indexed by X | BC | 3 bytes | 4 cycles* | ||||
| Direct Page Indexed by X | B4 | 2 bytes | 4 cycles* | ||||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| N | V | M | X | D | I | Z | C | |
| N | . | . | . | . | . | Z | . | |
LDY (Load Y) is a 65x instruction that loads a value into the Y index register. In immediate addressing only, LDY takes a total of 3 bytes when the index registers are 16 bits wide.
Syntax
LDY #const LDY addr LDY dp LDY addr, X LDY dp, X
Cycle Penalties
- In direct page addressing modes, LDY takes another extra cycle if the low byte of the direct page register is nonzero.
See Also
External Links
- Eyes & Lichty, page 464 on LDY
- Labiak, page 151 on LDY
- 7.1 on MCS6500 Manual, page 96 on LDY
- Carr, page 264 on LDY
- Leventhal, page 3-74 on LDY
- snes9x implementation of LDY: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L817
- undisbeliever on LDY: https://undisbeliever.net/snesdev/65816-opcodes.html#ldy-load-index-register-y-from-memory
- Pickens, John. http://www.6502.org/tutorials/6502opcodes.html#LDY