BRA (SPC700): Difference between revisions

Latest revision as of 21:56, 4 August 2024


Basic Info
Addressing Mode	Opcode	Length	Speed
Program Counter Relative	2F	2 bytes	4 cycles


Flags Affected
N	V	P	B	H	I	Z	C
.	.	.	.	.	.	.	.

BRA is an SPC700 instruction that performs an unconditional branch.

No flags are affected.

BRA rel

Where rel is a two's complement offset.

@@ Line 7: / Line 7: @@
 |'''Speed'''
 |+
-|relative
+|[[Program Counter Relative]]
 |2F
-|2 byte
+|2 bytes
 |4 cycles
 |}
 {| class="wikitable" style="float:right;clear:right;width:30%"
-!colspan="8"|Flags Clobbered
+!colspan="8"|Flags Affected
 |+
-|N
+|[[Negative Flag|N]]
-|V
+|[[Overflow Flag|V]]
-|P
+|[[Direct Page Flag|P]]
-|B
+|[[Break Flag|B]]
-|H
+|[[Half-Carry Flag|H]]
-|I
+|[[Interrupt Enable Flag|I]]
-|Z
+|[[Zero Flag|Z]]
-|C
+|[[Carry Flag|C]]
 |+
 |.
@@ Line 36: / Line 36: @@
 '''BRA''' is an [[SPC700]] instruction that performs an unconditional branch.
+No flags are affected.
+==== Syntax ====
+<pre>
+BRA rel
+</pre>
+Where rel is a two's complement offset.
 === See Also ===
@@ Line 42: / Line 51: @@
 === External Links ===
-* Official Super Nintendo development manual on BRA: [https://archive.org/details/SNESDevManual/book1/page/n233 Appendix C-8 of Book I]
+* Official Super Nintendo development manual on BRA: Table C-15, [https://archive.org/details/SNESDevManual/book1/page/n233 Appendix C-8 of Book I]
+* anomie: https://github.com/yupferris/TasmShiz/blob/master/spc700.txt#L366
 [[Category:ASM]]
 [[Category:SPC700]]
 [[Category:Branching Commands]]
+[[Category:Two-byte Instructions]]