EOR (SPC700): Difference between revisions

Latest revision as of 13:59, 30 July 2024


Basic Info
Addressing Mode	Opcode	Length	Speed
Immediate	48	2 bytes	2 cycles
Implied Indirect (type 2)	46	1 byte	3 cycles
Direct Page	44	2 bytes	3 cycles
Direct Page Indexed by X	54	2 bytes	4 cycles
Absolute	45	3 bytes	4 cycles
Absolute Indexed by X	55	3 bytes	5 cycles
Absolute Indexed by Y	56	3 bytes	5 cycles
Direct Page Indexed Indirect by X	47	2 bytes	6 cycles
Direct Page Indirect Indexed by Y	57	2 bytes	6 cycles
Implied Indirect (type 1)	59	1 bytes	5 cycles
Direct Page	49	3 bytes	6 cycles
Direct Page Immediate	58	3 bytes	5 cycles


Flags Affected
N	V	P	B	H	I	Z	C
N	.	.	.	.	.	Z	.

EOR is an SPC700 instruction that performs an exclusive or.

The operands are stored in the instruction stream in the opposite order they appear in the assembler source. In the assembler source, the operand on the right is the source and the operand on the left is the destination.

Syntax

EOR A, #imm
EOR A, (X)
EOR A, dp
EOR A, dp+X
EOR A, !abs
EOR A, !abs+X
EOR A, !abs+Y
EOR A, [dp+X]
EOR A, [dp]+Y
EOR (X), (Y)
EOR dp<d>, dp<s>
EOR dp, #imm

External Links

Official Super Nintendo development manual on EOR: Appendix C-6 of Book I
anomie: https://github.com/yupferris/TasmShiz/blob/master/spc700.txt#L430

@@ Line 12: / Line 12: @@
 |2 cycles
 |+
-|
+|[[Implied Indirect]] (type 2)
 |46
 |1 byte
@@ Line 42: / Line 42: @@
 |5 cycles
 |+
-|
+|[[Direct Page Indexed Indirect by X]]
 |47
 |2 bytes
 |6 cycles
 |+
-|
+|[[Direct Page Indirect Indexed by Y]]
 |57
 |2 bytes
 |6 cycles
 |+
-|
+|[[Implied Indirect]] (type 1)
 |59
 |1 bytes
 |5 cycles
 |+
-|
+|[[Direct Page]]
 |49
 |3 bytes
@@ Line 69: / Line 69: @@
 {| class="wikitable" style="float:right;clear:right;width:30%"
-!colspan="8"|Flags Clobbered
+!colspan="8"|Flags Affected
+|+
+|[[Negative Flag|N]]
+|[[Overflow Flag|V]]
+|[[Direct Page Flag|P]]
+|[[Break Flag|B]]
+|[[Half-Carry Flag|H]]
+|[[Interrupt Enable Flag|I]]
+|[[Zero Flag|Z]]
+|[[Carry Flag|C]]
 |+
 |N
-|V
-|P
-|B
-|H
-|I
-|Z
-|C
-|+
-|
 |.
 |.
@@ Line 86: / Line 86: @@
 |.
 |.
-|
+|Z
 |.
 |}
 '''EOR''' is an [[SPC700]] instruction that performs an exclusive or.
+The operands are stored in the instruction stream in the opposite order they appear in the assembler source. In the assembler source, the operand on the right is the source and the operand on the left is the destination.
+==== Syntax ====
+<pre>
+EOR A, #imm
+EOR A, (X)
+EOR A, dp
+EOR A, dp+X
+EOR A, !abs
+EOR A, !abs+X
+EOR A, !abs+Y
+EOR A, [dp+X]
+EOR A, [dp]+Y
+EOR (X), (Y)
+EOR dp<d>, dp<s>
+EOR dp, #imm
+</pre>
 === See Also ===
@@ Line 100: / Line 118: @@
 === External Links ===
 * Official Super Nintendo development manual on EOR: [https://archive.org/details/SNESDevManual/book1/page/n231 Appendix C-6 of Book I]
+* anomie: https://github.com/yupferris/TasmShiz/blob/master/spc700.txt#L430
 [[Category:ASM]]
 [[Category:SPC700]]
 [[Category:8-bit Logic Operation Commands]]