We've just updated MediaWiki and its underlying software. If anything doesn't look or work quite right, please mention it to us. --RanAS
fullsnes: Difference between revisions
From SnesLab
(ascii art) |
(Main Volume page of official docs) |
||
Line 4: | Line 4: | ||
* In https://problemkaputt.de/fullsnes.htm#snescartridgecicnotes, the formula for the [[Polynomial Counter]] is missing an inversion in the second term. | * In https://problemkaputt.de/fullsnes.htm#snescartridgecicnotes, the formula for the [[Polynomial Counter]] is missing an inversion in the second term. | ||
* In https://problemkaputt.de/fullsnes.htm#snesapuspc700ioports, it could be clearer that bits 0-3 of TnOUT are reset to 0 automatically by hardware after reading - it is not the programmer's responsibility to zero them after reading. [1] | * In https://problemkaputt.de/fullsnes.htm#snesapuspc700ioports, it could be clearer that bits 0-3 of TnOUT are reset to 0 automatically by hardware after reading - it is not the programmer's responsibility to zero them after reading. [1] | ||
* In https://problemkaputt.de/fullsnes.htm#snesapudspvolumeregisters, MVOL should stand for "main volume," not "master volume" because MVOL does not control the echo volume, and the | * In https://problemkaputt.de/fullsnes.htm#snesapudspvolumeregisters, MVOL should stand for "main volume," not "master volume" because MVOL does not control the echo volume, and "Main Volume" is how the official docs expand "MVOL." [2] | ||
=== External Links === | === External Links === | ||
Line 12: | Line 12: | ||
=== References === | === References === | ||
* [1] [https://archive.org/details/SNESDevManual/book1/page/n163/mode/2up Page 3-5-2 (NCL PG 11) of Book I of the official Nintendo documentation]: "When CN is read, the 4-bit up counter alone is cleared through IC internal timing" | * [1] [https://archive.org/details/SNESDevManual/book1/page/n163/mode/2up Page 3-5-2 (NCL PG 11) of Book I of the official Nintendo documentation]: "When CN is read, the 4-bit up counter alone is cleared through IC internal timing" | ||
* [2] https://archive.org/details/SNESDevManual/book1/page/n175 |
Revision as of 00:33, 22 May 2023
Fullsnes is a large hardware reference for the SNES created by nocash with several ascii art illustrations.
Errata
- In https://problemkaputt.de/fullsnes.htm#snescartridgecicnotes, the formula for the Polynomial Counter is missing an inversion in the second term.
- In https://problemkaputt.de/fullsnes.htm#snesapuspc700ioports, it could be clearer that bits 0-3 of TnOUT are reset to 0 automatically by hardware after reading - it is not the programmer's responsibility to zero them after reading. [1]
- In https://problemkaputt.de/fullsnes.htm#snesapudspvolumeregisters, MVOL should stand for "main volume," not "master volume" because MVOL does not control the echo volume, and "Main Volume" is how the official docs expand "MVOL." [2]
External Links
References
- [1] Page 3-5-2 (NCL PG 11) of Book I of the official Nintendo documentation: "When CN is read, the 4-bit up counter alone is cleared through IC internal timing"
- [2] https://archive.org/details/SNESDevManual/book1/page/n175