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EOR (SPC700): Difference between revisions
From SnesLab
(dp imm admode) |
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Line 12: | Line 12: | ||
|2 cycles | |2 cycles | ||
|+ | |+ | ||
| | |[[Implied Indirect]] (type 2) | ||
|46 | |46 | ||
|1 byte | |1 byte | ||
Line 42: | Line 42: | ||
|5 cycles | |5 cycles | ||
|+ | |+ | ||
| | |[[Direct Page Indexed Indirect by X]] | ||
|47 | |47 | ||
|2 bytes | |2 bytes | ||
|6 cycles | |6 cycles | ||
|+ | |+ | ||
| | |[[Direct Page Indirect Indexed by Y]] | ||
|57 | |57 | ||
|2 bytes | |2 bytes | ||
|6 cycles | |6 cycles | ||
|+ | |+ | ||
| | |[[Implied Indirect]] (type 1) | ||
|59 | |59 | ||
|1 bytes | |1 bytes | ||
|5 cycles | |5 cycles | ||
|+ | |+ | ||
| | |[[Direct Page]] | ||
|49 | |49 | ||
|3 bytes | |3 bytes |
Revision as of 16:53, 24 July 2023
Basic Info | |||||||
---|---|---|---|---|---|---|---|
Addressing Mode | Opcode | Length | Speed | ||||
Immediate | 48 | 2 bytes | 2 cycles | ||||
Implied Indirect (type 2) | 46 | 1 byte | 3 cycles | ||||
Direct Page | 44 | 2 bytes | 3 cycles | ||||
Direct Page Indexed by X | 54 | 2 bytes | 4 cycles | ||||
Absolute | 45 | 3 bytes | 4 cycles | ||||
Absolute Indexed by X | 55 | 3 bytes | 5 cycles | ||||
Absolute Indexed by Y | 56 | 3 bytes | 5 cycles | ||||
Direct Page Indexed Indirect by X | 47 | 2 bytes | 6 cycles | ||||
Direct Page Indirect Indexed by Y | 57 | 2 bytes | 6 cycles | ||||
Implied Indirect (type 1) | 59 | 1 bytes | 5 cycles | ||||
Direct Page | 49 | 3 bytes | 6 cycles | ||||
Direct Page Immediate | 58 | 3 bytes | 5 cycles |
Flags Clobbered | |||||||
---|---|---|---|---|---|---|---|
N | V | P | B | H | I | Z | C |
. | . | . | . | . | . |
EOR is an SPC700 instruction that performs an exclusive or.
See Also
External Links
- Official Super Nintendo development manual on EOR: Appendix C-6 of Book I