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TRB

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Revision as of 08:33, 8 December 2023 by Xetheria (talk | contribs) (Cycle Penalties header)
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Basic Info
Addressing Mode Opcode Length Speed
Absolute 1C 3 bytes 6 cycles*
Direct Page 14 2 bytes 5 cycles*
Flags Affected
N V M X D I Z C
. . . . . . .

TRB (Test and Reset Bits) is a 65c816 instruction that tests and resets bits using the accumulator. For each set bit in the accumulator, the corresponding memory bit is cleared.

Cycle Penalties

See Also

External Links