ADC (Super FX): Difference between revisions

Latest revision as of 17:34, 29 November 2023


Basic Info
Addressing Mode	Opcode	Length	ROM Speed	RAM Speed	Cache Speed
	3D5n	2 bytes	6 cycles	6 cycles	2 cycle
Immediate	3F5n	2 bytes	6 cycles	6 cycles	2 cycle


Flags Affected
B	ALT1	ALT2	O/V	S	CY	Z
0	0	0

ADC (Add with carry) is a Super FX instruction that performs an addition. The source register is always the first addend. The second addend may be any of the 16 R registers or an immediate value. The third addend is CY. The sum is stored in the destination register.

External Links

Official Nintendo documentation on ADC: Page 2-9-3 of Book II

@@ Line 1: / Line 1: @@
-{| class="wikitable" style="float:right;clear:right;width:40%"
+{| class="wikitable" style="float:right;clear:right;width:60%"
 !colspan="8"|Basic Info
 |+
@@ Line 10: / Line 10: @@
 |+
 |
-|D5n
+|3D5n
 |2 bytes
 |6 cycles
@@ Line 16: / Line 16: @@
 |2 cycle
 |+
-|immediate
+|[[Immediate]]
 |3F5n
 |2 bytes
@@ Line 25: / Line 25: @@
 {| class="wikitable" style="float:right;clear:right;width:30%"
-!colspan="9"|Flags Clobbered
+!colspan="9"|Flags Affected
 |+
 |B
-|ALT1
+|[[ALT1]]
-|ALT2
+|[[ALT2]]
-|O/V
+|[[O/V]]
 |S
-|CY
+|[[CY]]
 |Z
 |+
@@ Line 44: / Line 44: @@
 |}
-'''ADC''' (Add with carry) is a [[Super FX]] instruction that performs an addition.
+'''ADC''' (Add with carry) is a [[Super FX]] instruction that performs an addition.  The [[source register]] is always the first addend.  The second addend may be any of the 16 R registers or an immediate value.  The third addend is [[CY]]. The sum is stored in the destination register.
 === See Also ===
+* [[ADD]]
 * [[ADC]]
+* [[SUB]]
 === External Links ===
@@ Line 55: / Line 57: @@
 [[Category:Super FX]]
 [[Category:Arithmetic Operation Instructions]]
+[[Category:Two-byte Instructions]]