ADD (Super FX): Difference between revisions

Latest revision as of 01:00, 27 November 2023


Basic Info
Addressing Mode	Opcode	Length	ROM Speed	RAM Speed	Cache Speed
	5n	1 bytes	3 cycles	3 cycles	1 cycle
Immediate	3E5n	2 bytes	6 cycles	6 cycles	2 cycle


Flags Affected
B	ALT1	ALT2	O/V	S	CY	Z
0	0	0	.	.	.	.

ADD is Super FX instruction that performs an addition. The source register is always an addend. The other addend may be any of the 16 R registers or an immediate value. The sum is stored in the destination register.

CY is not an addend.

External Links

Official Nintendo documentation on ADD: Page 2-9-5 of Book II

@@ Line 1: / Line 1: @@
-'''ADD''' is [[Super FX]] instruction that performs an addition.
+{| class="wikitable" style="float:right;clear:right;width:60%"
+!colspan="8"|Basic Info
+|+
+|'''Addressing Mode'''
+|'''Opcode'''
+|'''Length'''
+|'''ROM Speed'''
+|'''RAM Speed'''
+|'''Cache Speed'''
+|+
+|
+|5n
+|1 bytes
+|3 cycles
+|3 cycles
+|1 cycle
+|+
+|[[Immediate]]
+|3E5n
+|2 bytes
+|6 cycles
+|6 cycles
+|2 cycle
+|}
 {| class="wikitable" style="float:right;clear:right;width:30%"
-!colspan="9"|Flags Clobbered
+!colspan="9"|Flags Affected
 |+
 |B
-|ALT1
+|[[ALT1]]
-|ALT2
+|[[ALT2]]
-|O/V
+|[[O/V]]
 |S
-|CY
+|[[CY]]
 |Z
 |+
@@ Line 20: / Line 43: @@
 |.
 |}
+'''ADD''' is [[Super FX]] instruction that performs an addition.  The [[source register]] is always an addend.  The other addend may be any of the 16 R registers or an immediate value.  The sum is stored in the [[destination register]].
+[[CY]] is not an addend.
+=== See Also ===
+* [[ADC]]
+* [[ADC (Super FX)]]
+* [[SUB]]
+=== External Links ===
+* Official Nintendo documentation on ADD: [https://archive.org/details/SNESDevManual/book2/page/n161 Page 2-9-5 of Book II]
 [[Category:ASM]]
-[[Category:Enhancement Chips]]
+[[Category:Super FX]]
+[[Category:Arithmetic Operation Instructions]]