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AND: Difference between revisions

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* [[Labiak]] page 116 on AND: https://archive.org/details/Programming_the_65816/page/n125
* [[Labiak]] page 116 on AND: https://archive.org/details/Programming_the_65816/page/n125
* [[MCS6500 Manual]] page on AND: https://archive.org/details/mos_microcomputers_programming_manual/page/n35
* [[MCS6500 Manual]] page on AND: https://archive.org/details/mos_microcomputers_programming_manual/page/n35
* [[Carr]] page on AND: https://archive.org/details/6502UsersManual/page/n259
* [[Carr]] page 246 on AND: https://archive.org/details/6502UsersManual/page/n259
* [[Leventhal]] page 3-40 on AND: https://archive.org/details/6502-assembly-language-programming/page/n89
* [[Leventhal]] page 3-40 on AND: https://archive.org/details/6502-assembly-language-programming/page/n89
* undisbeliever on AND: https://undisbeliever.net/snesdev/65816-opcodes.html#and-and-accumulator-with-memory
* undisbeliever on AND: https://undisbeliever.net/snesdev/65816-opcodes.html#and-and-accumulator-with-memory

Revision as of 05:26, 5 December 2023

Basic Info
Addressing Mode Opcode Length Speed
Immediate 29 2 bytes 2 cycles*
Absolute 2D 3 bytes 4 cycles*
Absolute Long 2F 4 bytes 5 cycles*
Direct Page 25 2 bytes 3 cycles*
Direct Page Indirect 32 2 bytes 5 cycles*
Direct Page Indirect Long 27 2 bytes 6 cycles*
absolute indexed by X 3D 3 bytes 4 cycles*
absolute long indexed by X 3F 4 bytes 5 cycles*
absolute indexed by Y 39 3 bytes 4 cycles*
direct page indexed by X 35 2 bytes 4 cycles*
direct page indirect indexed by X 21 2 bytes 6 cycles*
direct page indirect indexed by Y 31 2 bytes 5 cycles*
direct page indirect long indexed by Y 37 2 bytes 6 cycles*
Stack Relative 23 2 bytes 4 cycles*
stack relative indirect indexed by Y 33 2 bytes 7 cycles*
Flags Affected
N V M X D I Z C
. . . . . .

AND is a 65x instruction that performs a logical AND. The conjunction is stored in the accumulator.

Cycle Penalties

See Also

External Links