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AND: Difference between revisions
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|'''Speed''' | |'''Speed''' | ||
|+ | |+ | ||
| | |[[Immediate]] | ||
|29 | |29 | ||
|2 bytes | |2 bytes | ||
|2 cycles* | |2 cycles* | ||
|+ | |+ | ||
| | |[[Absolute]] | ||
|2D | |2D | ||
|3 bytes | |3 bytes | ||
|4 cycles* | |4 cycles* | ||
|+ | |+ | ||
| | |[[Absolute Long]] | ||
|2F | |2F | ||
|4 bytes | |4 bytes | ||
|5 cycles* | |5 cycles* | ||
|+ | |+ | ||
| | |[[Direct Page Addressing|Direct Page]] | ||
|25 | |25 | ||
|2 bytes | |2 bytes | ||
|3 cycles* | |3 cycles* | ||
|+ | |+ | ||
| | |[[Direct Page Indirect]] | ||
|32 | |32 | ||
|2 bytes | |2 bytes | ||
|5 cycles* | |5 cycles* | ||
|+ | |+ | ||
| | |[[Direct Page Indirect Long]] | ||
|27 | |27 | ||
|2 bytes | |2 bytes | ||
| Line 72: | Line 72: | ||
|6 cycles* | |6 cycles* | ||
|+ | |+ | ||
| | |[[Stack Relative]] | ||
|23 | |23 | ||
|2 bytes | |2 bytes | ||
| Line 86: | Line 86: | ||
!colspan="8"|Flags Affected | !colspan="8"|Flags Affected | ||
|+ | |+ | ||
|N | |[[Negative Flag|N]] | ||
|V | |[[Overflow Flag|V]] | ||
|M | |[[M Flag|M]] | ||
|X | |[[X Flag|X]] | ||
|D | |[[Decimal Flag|D]] | ||
|I | |[[I Flag|I]] | ||
|Z | |[[Zero Flag|Z]] | ||
|C | |[[Carry Flag|C]] | ||
|+ | |+ | ||
| | | | ||
| Line 105: | Line 105: | ||
|} | |} | ||
'''AND''' is a 65x instruction that performs a logical AND. | '''AND''' is a 65x instruction that performs a logical AND. The conjunction is stored in the [[accumulator]]. | ||
===== Cycle Penalties ===== | |||
* In all [[addressing modes]], AND takes one extra cycle when the accumulator is 16 bits wide. | |||
* In [[direct page addressing]] modes only, AND takes an extra cycle if the low byte of the [[direct page register]] is nonzero. | |||
* In both [[Absolute Indexed]] addressing modes and DP Indirect Indexed by Y admodes, AND takes an extra cycle if adding the index crosses a page boundary. | |||
=== See Also === | === See Also === | ||
* [[ORA]] | * [[ORA]] | ||
* [[EOR]] | * [[EOR]] | ||
* [[BIT]] | |||
* [[AND (Super FX)]] | |||
=== External Links === | === External Links === | ||
* [[Eyes & Lichty]] page on AND: https://archive.org/details/0893037893ProgrammingThe65816/page/n451 | * [[Eyes & Lichty]] page 425 on AND: https://archive.org/details/0893037893ProgrammingThe65816/page/n451 | ||
* [[Labiak]] page on AND: https://archive.org/details/Programming_the_65816/page/n125 | * [[Labiak]] page 116 on AND: https://archive.org/details/Programming_the_65816/page/n125 | ||
* [[MCS6500 Manual]] page on AND: https://archive.org/details/mos_microcomputers_programming_manual/page/n35 | * [[MCS6500 Manual]] page 20 on AND: https://archive.org/details/mos_microcomputers_programming_manual/page/n35 | ||
* [[Carr]] page on AND: https://archive.org/details/6502UsersManual/page/n259 | * https://archive.org/details/mos_microcomputers_programming_manual/page/n204, lbid. | ||
* [[Leventhal]] page on AND: https://archive.org/details/6502-assembly-language-programming/page/ | * [[Carr]] page 246 on AND: https://archive.org/details/6502UsersManual/page/n259 | ||
* [[Leventhal]] page 3-40 on AND: https://archive.org/details/6502-assembly-language-programming/page/n89 | |||
* undisbeliever on AND: https://undisbeliever.net/snesdev/65816-opcodes.html#and-and-accumulator-with-memory | * undisbeliever on AND: https://undisbeliever.net/snesdev/65816-opcodes.html#and-and-accumulator-with-memory | ||
Latest revision as of 08:22, 19 December 2023
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Immediate | 29 | 2 bytes | 2 cycles* | ||||
| Absolute | 2D | 3 bytes | 4 cycles* | ||||
| Absolute Long | 2F | 4 bytes | 5 cycles* | ||||
| Direct Page | 25 | 2 bytes | 3 cycles* | ||||
| Direct Page Indirect | 32 | 2 bytes | 5 cycles* | ||||
| Direct Page Indirect Long | 27 | 2 bytes | 6 cycles* | ||||
| absolute indexed by X | 3D | 3 bytes | 4 cycles* | ||||
| absolute long indexed by X | 3F | 4 bytes | 5 cycles* | ||||
| absolute indexed by Y | 39 | 3 bytes | 4 cycles* | ||||
| direct page indexed by X | 35 | 2 bytes | 4 cycles* | ||||
| direct page indirect indexed by X | 21 | 2 bytes | 6 cycles* | ||||
| direct page indirect indexed by Y | 31 | 2 bytes | 5 cycles* | ||||
| direct page indirect long indexed by Y | 37 | 2 bytes | 6 cycles* | ||||
| Stack Relative | 23 | 2 bytes | 4 cycles* | ||||
| stack relative indirect indexed by Y | 33 | 2 bytes | 7 cycles* | ||||
| Flags Affected | |||||||
|---|---|---|---|---|---|---|---|
| N | V | M | X | D | I | Z | C |
| . | . | . | . | . | . | ||
AND is a 65x instruction that performs a logical AND. The conjunction is stored in the accumulator.
Cycle Penalties
- In all addressing modes, AND takes one extra cycle when the accumulator is 16 bits wide.
- In direct page addressing modes only, AND takes an extra cycle if the low byte of the direct page register is nonzero.
- In both Absolute Indexed addressing modes and DP Indirect Indexed by Y admodes, AND takes an extra cycle if adding the index crosses a page boundary.
See Also
External Links
- Eyes & Lichty page 425 on AND: https://archive.org/details/0893037893ProgrammingThe65816/page/n451
- Labiak page 116 on AND: https://archive.org/details/Programming_the_65816/page/n125
- MCS6500 Manual page 20 on AND: https://archive.org/details/mos_microcomputers_programming_manual/page/n35
- https://archive.org/details/mos_microcomputers_programming_manual/page/n204, lbid.
- Carr page 246 on AND: https://archive.org/details/6502UsersManual/page/n259
- Leventhal page 3-40 on AND: https://archive.org/details/6502-assembly-language-programming/page/n89
- undisbeliever on AND: https://undisbeliever.net/snesdev/65816-opcodes.html#and-and-accumulator-with-memory