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AND (Super FX): Difference between revisions
From SnesLab
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|'''Cache Speed''' | |'''Cache Speed''' | ||
|+ | |+ | ||
| | |[[Immediate]] | ||
|3E7n | |3E7n | ||
|2 bytes | |2 bytes | ||
| Line 16: | Line 16: | ||
|2 cycles | |2 cycles | ||
|+ | |+ | ||
| | |[[Implied]] | ||
|7n | |7n | ||
|1 byte | |1 byte | ||
| Line 28: | Line 28: | ||
|+ | |+ | ||
|B | |B | ||
|ALT1 | |[[ALT1]] | ||
|ALT2 | |[[ALT2]] | ||
|O/V | |[[O/V]] | ||
|S | |S | ||
|CY | |[[CY]] | ||
|Z | |Z | ||
|+ | |+ | ||
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|} | |} | ||
'''AND''' is a [[Super FX]] instruction that performs a logical AND. | '''AND''' is a [[Super FX]] instruction that performs a logical AND on the [[source register]] and R<sub>n</sub>. The conjunction is stored in the [[destination register]]. The operand may not be R<sub>0</sub>. | ||
=== See Also === | === See Also === | ||
Latest revision as of 02:01, 19 December 2023
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | ROM Speed | RAM Speed | Cache Speed | ||
| Immediate | 3E7n | 2 bytes | 6 cycles | 6 cycles | 2 cycles | ||
| Implied | 7n | 1 byte | 3 cycles | 3 cycles | 1 cycle | ||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| B | ALT1 | ALT2 | O/V | S | CY | Z | ||
| 0 | 0 | 0 | . | . | ||||
AND is a Super FX instruction that performs a logical AND on the source register and Rn. The conjunction is stored in the destination register. The operand may not be R0.
See Also
External Links
- Official Nintendo documentation on AND: Page 2-9-10 of Book II