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BBS (SPC700): Difference between revisions

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|'''Speed'''
|'''Speed'''
|+
|+
|[[Direct Page Addressing | Direct Page]]
|[[Direct Page Bit Relative]]
|03
|03
|3 bytes
|3 bytes
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when condition true: 7 cycles
when condition true: 7 cycles
|+
|+
|[[Direct Page Addressing | Direct Page]]
|[[Direct Page Bit Relative]]
|23
|23
|3 bytes
|3 bytes
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when condition true: 7 cycles
when condition true: 7 cycles
|+
|+
|[[Direct Page Addressing | Direct Page]]
|[[Direct Page Bit Relative]]
|43
|43
|3 bytes
|3 bytes
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when condition true: 7 cycles
when condition true: 7 cycles
|+
|+
|[[Direct Page Addressing | Direct Page]]
|[[Direct Page Bit Relative]]
|63
|63
|3 bytes
|3 bytes
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when condition true: 7 cycles
when condition true: 7 cycles
|+
|+
|[[Direct Page Addressing | Direct Page]]
|[[Direct Page Bit Relative]]
|83
|83
|3 bytes
|3 bytes
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when condition true: 7 cycles
when condition true: 7 cycles
|+
|+
|[[Direct Page Addressing | Direct Page]]
|[[Direct Page Bit Relative]]
|A3
|A3
|3 bytes
|3 bytes
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when condition true: 7 cycles
when condition true: 7 cycles
|+
|+
|[[Direct Page Addressing | Direct Page]]
|[[Direct Page Bit Relative]]
|C3
|C3
|3 bytes
|3 bytes
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when condition true: 7 cycles
when condition true: 7 cycles
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|[[Direct Page Addressing | Direct Page]]
|[[Direct Page Bit Relative]]
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=== References ===
=== References ===
* [https://archive.org/details/SNESDevManual/book1/page/n233 Appendix C-8 of Book I] of the official Super Nintendo development manual
* Table C-15,  [https://archive.org/details/SNESDevManual/book1/page/n233 Appendix C-8 of Book I] of the official Super Nintendo development manual


[[Category:ASM]]
[[Category:ASM]]
[[Category:SPC700]]
[[Category:SPC700]]
[[Category:Branching Commands]]
[[Category:Branching Commands]]

Latest revision as of 07:53, 18 December 2023

Basic Info
Addressing Mode Opcode Length Speed
Direct Page Bit Relative 03 3 bytes when condition false: 5 cycles

when condition true: 7 cycles

Direct Page Bit Relative 23 3 bytes when condition false: 5 cycles

when condition true: 7 cycles

Direct Page Bit Relative 43 3 bytes when condition false: 5 cycles

when condition true: 7 cycles

Direct Page Bit Relative 63 3 bytes when condition false: 5 cycles

when condition true: 7 cycles

Direct Page Bit Relative 83 3 bytes when condition false: 5 cycles

when condition true: 7 cycles

Direct Page Bit Relative A3 3 bytes when condition false: 5 cycles

when condition true: 7 cycles

Direct Page Bit Relative C3 3 bytes when condition false: 5 cycles

when condition true: 7 cycles

Direct Page Bit Relative E3 3 bytes when condition false: 5 cycles

when condition true: 7 cycles

Flags Affected
N V P B H I Z C
. . . . . . . .

BBS (Branch on Bit Set) is an SPC700 instruction that performs a branch when a bit in the direct page is set. The index to the direct page byte that bit lives in is the first operand byte. Which bit within that byte is a specified by the top 3 bits of the opcode. The target relative address to jump to is the second operand byte.

In assembly source, the two operands appear in the same order that they do in the instruction stream.

See Also

References