We've just updated MediaWiki and its underlying software. If anything doesn't look or work quite right, please mention it to us. --RanAS

BBS (SPC700): Difference between revisions

From SnesLab
Jump to: navigation, search
(added link to official dev manual)
(more correct admode name)
 
(10 intermediate revisions by the same user not shown)
Line 1: Line 1:
'''BBS''' (Branch on Bit Set) is an [[SPC700]] that performs a branch when the [[direct page flag]] is set.
{| class="wikitable" style="float:right;clear:right;width:50%"
 
{| class="wikitable" style="float:right;clear:right;width:30%"
!colspan="8"|Basic Info
!colspan="8"|Basic Info
|+
|+
Line 9: Line 7:
|'''Speed'''
|'''Speed'''
|+
|+
|
|[[Direct Page Bit Relative]]
|x3
|03
|3 bytes
|when condition false: 5 cycles
when condition true: 7 cycles
|+
|[[Direct Page Bit Relative]]
|23
|3 bytes
|when condition false: 5 cycles
when condition true: 7 cycles
|+
|[[Direct Page Bit Relative]]
|43
|3 bytes
|when condition false: 5 cycles
when condition true: 7 cycles
|+
|[[Direct Page Bit Relative]]
|63
|3 bytes
|when condition false: 5 cycles
when condition true: 7 cycles
|+
|[[Direct Page Bit Relative]]
|83
|3 bytes
|3 bytes
|5 or 7 cycles
|when condition false: 5 cycles
when condition true: 7 cycles
|+
|[[Direct Page Bit Relative]]
|A3
|3 bytes
|when condition false: 5 cycles
when condition true: 7 cycles
|+
|[[Direct Page Bit Relative]]
|C3
|3 bytes
|when condition false: 5 cycles
when condition true: 7 cycles
|+
|[[Direct Page Bit Relative]]
|E3
|3 bytes
|when condition false: 5 cycles
when condition true: 7 cycles
|}
|}


{| class="wikitable" style="float:right;clear:right;width:30%"
{| class="wikitable" style="float:right;clear:right;width:30%"
!colspan="8"|Flags Clobbered
!colspan="8"|Flags Affected
|+
|+
|N
|[[Negative Flag|N]]
|V
|[[Overflow Flag|V]]
|P
|[[Direct Page Flag|P]]
|B
|[[Break Flag|B]]
|H
|[[Half-Carry Flag|H]]
|I
|[[Interrupt Enable Flag|I]]
|Z
|[[Zero Flag|Z]]
|C
|[[Carry Flag|C]]
|+
|+
|.
|.
Line 36: Line 77:
|.
|.
|}
|}
'''BBS''' (Branch on Bit Set) is an [[SPC700]] instruction that performs a branch when a bit in the [[direct page]] is set.  The index to the direct page byte that bit lives in is the first operand byte.  Which bit within that byte is a specified by the top 3 bits of the opcode.  The target relative address to jump to is the second operand byte.
In assembly source, the two operands appear in the same order that they do in the instruction stream.


=== See Also ===
=== See Also ===
* [[BBS]]
* [[BBC]]


=== References ===
=== References ===
* [https://archive.org/details/SNESDevManual/book1/page/n233 Appendix C-8 of Book I] of the official Super Nintendo development manual
* Table C-15,  [https://archive.org/details/SNESDevManual/book1/page/n233 Appendix C-8 of Book I] of the official Super Nintendo development manual


[[Category:ASM]]
[[Category:ASM]]
[[Category:SPC700]]
[[Category:SPC700]]
[[Category:Branching Commands]]
[[Category:Branching Commands]]

Latest revision as of 07:53, 18 December 2023

Basic Info
Addressing Mode Opcode Length Speed
Direct Page Bit Relative 03 3 bytes when condition false: 5 cycles

when condition true: 7 cycles

Direct Page Bit Relative 23 3 bytes when condition false: 5 cycles

when condition true: 7 cycles

Direct Page Bit Relative 43 3 bytes when condition false: 5 cycles

when condition true: 7 cycles

Direct Page Bit Relative 63 3 bytes when condition false: 5 cycles

when condition true: 7 cycles

Direct Page Bit Relative 83 3 bytes when condition false: 5 cycles

when condition true: 7 cycles

Direct Page Bit Relative A3 3 bytes when condition false: 5 cycles

when condition true: 7 cycles

Direct Page Bit Relative C3 3 bytes when condition false: 5 cycles

when condition true: 7 cycles

Direct Page Bit Relative E3 3 bytes when condition false: 5 cycles

when condition true: 7 cycles

Flags Affected
N V P B H I Z C
. . . . . . . .

BBS (Branch on Bit Set) is an SPC700 instruction that performs a branch when a bit in the direct page is set. The index to the direct page byte that bit lives in is the first operand byte. Which bit within that byte is a specified by the top 3 bits of the opcode. The target relative address to jump to is the second operand byte.

In assembly source, the two operands appear in the same order that they do in the instruction stream.

See Also

References