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BIC (Super FX): Difference between revisions
From SnesLab
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|'''Cache Speed''' | |'''Cache Speed''' | ||
|+ | |+ | ||
| | |[[Implied]] | ||
|3D7n | |3D7n | ||
|2 bytes | |2 bytes | ||
| Line 16: | Line 16: | ||
|2 cycles | |2 cycles | ||
|+ | |+ | ||
| | |[[Immediate]] | ||
|3F7n | |3F7n | ||
|2 bytes | |2 bytes | ||
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{| class="wikitable" style="float:right;clear:right;width:30%" | {| class="wikitable" style="float:right;clear:right;width:30%" | ||
!colspan="9"|Flags | !colspan="9"|Flags Affected | ||
|+ | |+ | ||
|B | |B | ||
|ALT1 | |[[ALT1]] | ||
|ALT2 | |[[ALT2]] | ||
|O/V | |[[O/V]] | ||
|S | |S | ||
|CY | |[[CY]] | ||
|Z | |Z | ||
|+ | |+ | ||
Latest revision as of 09:23, 25 November 2023
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | ROM Speed | RAM Speed | Cache Speed | ||
| Implied | 3D7n | 2 bytes | 6 cycles | 6 cycles | 2 cycles | ||
| Immediate | 3F7n | 2 bytes | 6 cycles | 6 cycles | 2 cycles | ||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| B | ALT1 | ALT2 | O/V | S | CY | Z | ||
| 0 | 0 | 0 | . | . | ||||
BIC (BIt Clear mask) is a Super FX instruction that performs a logical AND between the source register and the 1's complement of the operand. The conjunction is stored in the destination register.
See Also
External Links
- Official Nintendo documentation on BIC: Page 2-9-22 of Book II