BRK: Difference between revisions

Latest revision as of 01:32, 19 December 2023


Basic Info
Addressing Mode	Opcode	Length	Speed
Stack	00	2 bytes	8 cycles*


Flags Affected
	N	V	M	X / B	D	I	Z	C
65c816 native mode	.	.	.	.	0	1	.	.
6502 emulation mode	.	.	.	1	0	1	.	.

BRK (Break) is a 65x instruction designed to trigger a software interrupt. The byte following the opcode is called the Signature Byte. The state of the interrupt disable flag has no effect on the behavior of BRK.

Control is routed to the BRK handler, whose address is stored at the BRK vector. In native mode, this vector is at $00:FFE6. In emulation mode, this vector is at $FFFE.

Cycle Skipped

BRK takes one fewer cycle in emulation mode as it doesn't need to push the program counter bank register to the stack.

External Links

Eyes & Lichty page 436, on BRK: https://archive.org/details/0893037893ProgrammingThe65816/page/n462
Figure 13.3. illustration. Lbid. page 256
Labiak page 126 on BRK: https://archive.org/details/Programming_the_65816/page/n136
MCS6500 Manual page 144 on BRK: https://archive.org/details/mos_microcomputers_programming_manual/page/n164
Carr page 252 on BRK: https://archive.org/details/6502UsersManual/page/n265
Leventhal page 3-49 on BRK: https://archive.org/details/6502-assembly-language-programming/page/n98
snes9x implementation of BRK: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2547

@@ Line 7: / Line 7: @@
 |'''Speed'''
 |+
-|stack
+|[[Stack Addressing|Stack]]
 |00
 |2 bytes
-|7 cycles*
+|8 cycles*
 |}
-{| class="wikitable" style="float:right;clear:right;width:30%"
+{| class="wikitable" style="float:right;clear:right;width:40%"
 !colspan="9"|Flags Affected
 |+
+|
 |N
 |V
 |M
-|X
+|X / B
 |D
 |I
@@ Line 25: / Line 26: @@
 |C
 |+
+|[[65c816 native mode]]
+|.
+|.
+|.
+|.
+|0
+|1
+|.
+|.
+|+
+|[[6502 emulation mode]]
 |.
 |.
 |.
-|
+|1
 |0
 |1
@@ Line 35: / Line 47: @@
 |}
-'''BRK''' (Break) is a 65x instruction designed to trigger a software interrupt.  The byte following the opcode is called the [[Signature Byte]].  BRK takes one additional cycle in [[native mode]].
+'''BRK''' (Break) is a 65x instruction designed to trigger a software interrupt.  The byte following the opcode is called the [[Signature Byte]].  The state of the [[interrupt disable flag]] has no effect on the behavior of BRK.
+Control is routed to the BRK handler, whose address is stored at the BRK vector.  In native mode, this vector is at $00:FFE6.  In emulation mode, this vector is at $FFFE.
+===== Cycle Skipped =====
+BRK takes one fewer cycle in [[emulation mode]] as it doesn't need to push the [[program counter bank register]] to the [[stack]].
 === See Also ===
+* [[RTI]]
 * [[BRK (SPC700)]]
 * [[NMI]]
 * [[IRQ]]
+* [[COP]]
 === External Links ===
-* [[Eyes & Lichty]] page on BRK: https://archive.org/details/0893037893ProgrammingThe65816/page/n462
+* [[Eyes & Lichty]] page 436, on BRK: https://archive.org/details/0893037893ProgrammingThe65816/page/n462
-* [[Labiak]] page on BRK: https://archive.org/details/Programming_the_65816/page/n136
+* Figure 13.3.  illustration. Lbid. [https://archive.org/details/0893037893ProgrammingThe65816/page/n282 page 256]
-* [[MCS6500 Manual]] page on BRK: https://archive.org/details/mos_microcomputers_programming_manual/page/n164
+* [[Labiak]] page 126 on BRK: https://archive.org/details/Programming_the_65816/page/n136
-* [[Carr]] page on BRK: https://archive.org/details/6502UsersManual/page/n265
+* [[MCS6500 Manual]] page 144 on BRK: https://archive.org/details/mos_microcomputers_programming_manual/page/n164
-* [[Leventhal]] page on BRK: https://archive.org/details/6502-assembly-language-programming/page/n98
+* [[Carr]] page 252 on BRK: https://archive.org/details/6502UsersManual/page/n265
+* [[Leventhal]] page 3-49 on BRK: https://archive.org/details/6502-assembly-language-programming/page/n98
 * snes9x implementation of BRK: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2547
 [[Category:ASM]]
 [[Category:Inherited from 6502]]
+[[Category:Two-byte Instructions]]
+[[Category:Single Admode Mnemonics]]