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CLD: Difference between revisions

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'''CLD''' is a 65x instruction that clears the [[decimal mode flag]].
'''CLD''' is a 65x instruction that clears the [[decimal mode flag]], switching the processor back into binary mode.


=== See Also ===
=== See Also ===
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* [[Eyes & Lichty]] page 442, on CLD: https://archive.org/details/0893037893ProgrammingThe65816/page/n468
* [[Eyes & Lichty]] page 442, on CLD: https://archive.org/details/0893037893ProgrammingThe65816/page/n468
* [[Labiak]] page 131 on CLD: https://archive.org/details/Programming_the_65816/page/n141
* [[Labiak]] page 131 on CLD: https://archive.org/details/Programming_the_65816/page/n141
* [[MCS6500 Manual]] page on CLD: https://archive.org/details/mos_microcomputers_programming_manual/page/n42
* [[MCS6500 Manual]] page 27 on CLD: https://archive.org/details/mos_microcomputers_programming_manual/page/n42
* [[Carr]] page on CLD: https://archive.org/details/6502UsersManual/page/n267
* [[Carr]] page 254 on CLD: https://archive.org/details/6502UsersManual/page/n267
* [[Leventhal]] page 3-53 on CLD: https://archive.org/details/6502-assembly-language-programming/page/n102
* [[Leventhal]] page 3-53 on CLD: https://archive.org/details/6502-assembly-language-programming/page/n102
* snes9x implementation of CLD: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1434
* snes9x implementation of CLD: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1434
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[[Category:Inherited from 6502]]
[[Category:Inherited from 6502]]
[[Category:One-byte Instructions]]
[[Category:One-byte Instructions]]
[[Category:Implied Instructions]]
[[Category:Two-cycle Instructions]]

Latest revision as of 11:43, 14 December 2023

Basic Info
Addressing Mode Opcode Length Speed
Implied (type 2) D8 1 byte 2 cycles
Flags Affected
N V M X D I Z C
. . . . 0 . . .

CLD is a 65x instruction that clears the decimal mode flag, switching the processor back into binary mode.

See Also

External Links