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CMP (SPC700): Difference between revisions

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=== See Also ===
=== See Also ===
* [[CMPW]]
* [[CMPW]]
* [[CMP]]


=== External Links ===
=== External Links ===

Revision as of 06:28, 23 July 2023

Basic Info
Addressing Mode Opcode Length Speed
immediate 68 2 bytes 2 cycles
66 1 bytes 3 cycles
64 2 bytes 3 cycles
74 2 bytes 4 cycles
65 3 bytes 4 cycles
75 3 bytes 5 cycles
76 3 bytes 5 cycles
67 2 byte 6 cycles
77 2 bytes 6 cycles
79 1 bytes 5 cycles
69 3 bytes 6 cycles
78 3 bytes 5 cycles
C8 2 bytes 2 cycles
3E 2 bytes 3 cycles
1E 3 bytes 4 cycles
AD 2 bytes 2 cycles
7E 2 bytes 3 cycles
5E 3 bytes 4 cycles
Flags Affected
N V P B H I Z C
. . . . .

CMP is an SPC700 instruction that compares two operands. The right operand is subtracted from the left operand, but the difference is not stored anywhere - the side effect is the N, Z, and C flags being modified.

See Also

External Links