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COP: Difference between revisions

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(assemblers require signature byte)
(COP vector)
 
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'''COP''' (Co-Processor) is a [[65c816]] instruction designed to run a co-processor command.  The byte following the opcode is called the [[Signature Byte]] and is required by assemblers.  Signature bytes of 80h to FFh are reserved by the Western Design Center.  The state of the [[interrupt disable flag]] has no effect on the behavior of COP.
'''COP''' (Co-Processor) is a [[65c816]] instruction designed to run a co-processor command.  The byte following the opcode is called the [[Signature Byte]] and is required by assemblers.  Signature bytes of 80h to FFh are reserved by the Western Design Center.  The state of the [[interrupt disable flag]] has no effect on the behavior of COP.


COP triggers a software interrupt and control is routed to the COP handler.
COP triggers a software interrupt and control is routed to the COP handler, whose address is stored in the COP vector at $FFF4.


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Latest revision as of 15:08, 18 December 2023

Basic Info
Addressing Mode Opcode Length Speed
Stack 02 2 bytes 8 cycles*
Flags Affected
N V M X D I Z C
. . . . 0 1 . .

COP (Co-Processor) is a 65c816 instruction designed to run a co-processor command. The byte following the opcode is called the Signature Byte and is required by assemblers. Signature bytes of 80h to FFh are reserved by the Western Design Center. The state of the interrupt disable flag has no effect on the behavior of COP.

COP triggers a software interrupt and control is routed to the COP handler, whose address is stored in the COP vector at $FFF4.

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See Also

External Links