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Counter Register: Difference between revisions
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The '''Counter Register''' lives on the [[S-SMP]] at 00FDh, 00FEh, and 00FFh. Its value is indeterminate upon reset. Only the bottom 4 bits of each byte are used. | |||
=== See Also === | === See Also === | ||
* [[Control Register]] | * [[Control Register]] | ||
Latest revision as of 05:14, 20 December 2023
The Counter Register lives on the S-SMP at 00FDh, 00FEh, and 00FFh. Its value is indeterminate upon reset. Only the bottom 4 bits of each byte are used.
See Also
Reference
- page 3-5-3 of Book I of the official Super Nintendo development manual