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DBNZ (SPC700): Difference between revisions

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Revision as of 20:14, 18 July 2023

Basic Info
Addressing Mode Opcode Length Speed
6E 3 bytes when condition is false: 5 cycles

when condition is true: 7 cycles

FE 2 bytes when condition is false: 4 cycles

when condition is true: 6 cycles

Flags Affected
N V P B H I Z C
. . . . . . . .

DBNZ is an SPC700 instruction that decrements memory or the Y index register and then jumps if that value is nonzero.

See Also

External Links