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DIV2 (Super FX): Difference between revisions
From SnesLab
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''' | {| class="wikitable" style="float:right;clear:right;width:50%" | ||
!colspan="8"|Basic Info | |||
|+ | |||
|'''Opcode''' | |||
|'''Length''' | |||
|'''ROM Speed''' | |||
|'''RAM Speed''' | |||
|'''Cache Speed''' | |||
|+ | |||
|3D96 | |||
|2 bytes | |||
|6 cycles | |||
|6 cycles | |||
|2 cycles | |||
|} | |||
{| class="wikitable" style="float:right;clear:right;width:30%" | {| class="wikitable" style="float:right;clear:right;width:30%" | ||
!colspan="9"|Flags | !colspan="9"|Flags Affected | ||
|+ | |+ | ||
|B | |B | ||
|ALT1 | |[[ALT1]] | ||
|ALT2 | |[[ALT2]] | ||
|O/V | |[[O/V]] | ||
|S | |S | ||
|CY | |[[CY]] | ||
|Z | |Z | ||
|+ | |+ | ||
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| | | | ||
|} | |} | ||
'''DIV2''' (DIVide by 2) is a [[Super FX]] instruction that shifts the value of the [[source register]]'s bits one place to the right while also leaving the most significant bit unchanged, storing the result in the [[destination register]]. The source register itself is left unchanged. Unlike [[ASR]], the output becomes zero if the input is 0xFFFF. | |||
=== See Also === | === See Also === | ||
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* [[ASR]] | * [[ASR]] | ||
* [[LSR]] | * [[LSR]] | ||
* [[DIV (SPC700)]] | |||
=== External Links === | |||
* Official Nintendo documentation on DIV2: [https://archive.org/details/SNESDevManual/book2/page/n200 Page 2-9-44 of Book II] | |||
* example: [https://archive.org/details/SNESDevManual/book2/page/n201 page 2-9-45], lbid. | |||
[[Category:ASM]] | [[Category:ASM]] | ||
[[Category: | [[Category:Super FX]] | ||
[[Category:Arithmetic Operation Instructions]] | |||
[[Category:Two-byte Instructions]] |
Latest revision as of 02:53, 16 December 2023
Basic Info | |||||||
---|---|---|---|---|---|---|---|
Opcode | Length | ROM Speed | RAM Speed | Cache Speed | |||
3D96 | 2 bytes | 6 cycles | 6 cycles | 2 cycles |
Flags Affected | ||||||||
---|---|---|---|---|---|---|---|---|
B | ALT1 | ALT2 | O/V | S | CY | Z | ||
0 | 0 | 0 | . |
DIV2 (DIVide by 2) is a Super FX instruction that shifts the value of the source register's bits one place to the right while also leaving the most significant bit unchanged, storing the result in the destination register. The source register itself is left unchanged. Unlike ASR, the output becomes zero if the input is 0xFFFF.
See Also
External Links
- Official Nintendo documentation on DIV2: Page 2-9-44 of Book II
- example: page 2-9-45, lbid.