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EOR1 (SPC700): Difference between revisions

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(3 byte Instructions)
(→‎External Links: applicable memory location)
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=== External Links ===
=== External Links ===
* Official Super Nintendo development manual on EOR1: Table C-18 in [https://archive.org/details/SNESDevManual/book1/page/n234 Appendix C-9 of Book I]
* Official Super Nintendo development manual on EOR1: Table C-18 in [https://archive.org/details/SNESDevManual/book1/page/n234 Appendix C-9 of Book I]
* https://archive.org/details/SNESDevManual/book1/page/n186


[[Category:ASM]]
[[Category:ASM]]

Revision as of 05:15, 18 December 2023

Basic Info
Addressing Mode Opcode Length Speed
13-bit Absolute 8A 3 bytes 5 cycles
Flags Affected
N V P B H I Z C
. . . . . . .

EOR1 is an SPC700 instruction that performs an exclusive or between a memory bit and the carry flag and stores the sum in the carry flag. The low 13 bits of the operand specify an absolute address. The high 3 bits of the operand specify which bit at that absolute address.

See Also

External Links