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JMP (SPC700): Difference between revisions

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'''JMP''' is an [[SPC700]] instruction that performs an unconditional branch.
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{| class="wikitable" style="float:right;clear:right;width:30%"
!colspan="8"|Basic Info
!colspan="8"|Basic Info
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|'''Speed'''
|'''Speed'''
|+
|+
|
|[[Absolute]]
|5E
|5F
|3 bytes
|3 bytes
|3 cycles
|3 cycles
|+
|+
|
|[[Absolute Indexed by X]]
|1F
|1F
|3 bytes
|3 bytes
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{| class="wikitable" style="float:right;clear:right;width:30%"
!colspan="8"|Flags Clobbered
!colspan="8"|Flags Affected
|+
|+
|N
|[[Negative Flag|N]]
|V
|[[Overflow Flag|V]]
|P
|[[Direct Page Flag|P]]
|B
|[[Break Flag|B]]
|H
|[[Half-Carry Flag|H]]
|I
|[[Interrupt Enable Flag|I]]
|Z
|[[Zero Flag|Z]]
|C
|[[Carry Flag|C]]
|+
|+
|.
|.
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|.
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'''JMP''' is an [[SPC700]] instruction that performs an unconditional branch.
With absolute addressing, the SPC jumps to the address specified in the two bytes following the 5F opcode.
With absolute indexed by X addressing, the SPC jumps to the effective address specified by the two bytes following the 1F opcode plus the value in the [[X index register]].
=== See Also ===
* [[BRA (SPC700)]]
* [[BRA]]


=== External Links ===
=== External Links ===
* Official Super Nintendo development manual on JMP: [https://archive.org/details/SNESDevManual/book1/page/n234 Appendix C-8 of Book I]
* Official Super Nintendo development manual on JMP: Table C-15, [https://archive.org/details/SNESDevManual/book1/page/n233 Appendix C-8 of Book I]


[[Category:ASM]]
[[Category:ASM]]
[[Category:SPC700]]
[[Category:SPC700]]
[[Category:Branching Commands]]
[[Category:Branching Commands]]
[[Category:Three-byte Instructions]]

Latest revision as of 10:36, 14 December 2023

Basic Info
Addressing Mode Opcode Length Speed
Absolute 5F 3 bytes 3 cycles
Absolute Indexed by X 1F 3 bytes 6 cycles
Flags Affected
N V P B H I Z C
. . . . . . . .

JMP is an SPC700 instruction that performs an unconditional branch.

With absolute addressing, the SPC jumps to the address specified in the two bytes following the 5F opcode.

With absolute indexed by X addressing, the SPC jumps to the effective address specified by the two bytes following the 1F opcode plus the value in the X index register.

See Also

External Links