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LSR (SPC700): Difference between revisions

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(LSR is a divide by two)
(typos in manual)
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'''LSR''' (Logical Shift Right) is an [[SPC700]] instruction that shifts its operand one bit to the right, dividing it by two.  The least significant bit is shifted into the [[carry flag]].  A zero is shifted into the most significant bit.
'''LSR''' (Logical Shift Right) is an [[SPC700]] instruction that shifts its operand one bit to the right, dividing it by two.  The least significant bit is shifted into the [[carry flag]].  A zero is shifted into the most significant bit.
The official manual has the bit shift operators for LSR pointing the wrong way.


=== See Also ===
=== See Also ===

Revision as of 05:36, 23 July 2023

Basic Info
Addressing Mode Opcode Length Speed
5C 1 byte 2 cycles
4B 2 bytes 4 cycles
5B 2 bytes 5 cycles
4C 3 bytes 5 cycles
Flags Clobbered
N V P B H I Z C
. . . . .

LSR (Logical Shift Right) is an SPC700 instruction that shifts its operand one bit to the right, dividing it by two. The least significant bit is shifted into the carry flag. A zero is shifted into the most significant bit.

The official manual has the bit shift operators for LSR pointing the wrong way.

See Also

External Links