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List of Registers with Unused Bits: Difference between revisions
From SnesLab
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| STD CTRL 4L || 0 - 3 | | STD CTRL 4L || 0 - 3 | ||
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| [[PMON]] || 0 | |||
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Bits 10-12 of the [[Offset Change Mode]] data are unused. [1] | Bits 10-12 of the [[Offset Change Mode]] data are unused. <sup>[1]</sup> | ||
=== See Also === | === See Also === | ||
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[[Category:ASM]] | [[Category:ASM]] | ||
[[Category:SNES Hardware]] | [[Category:SNES Hardware]] | ||
[[Category:Registers]] | |||
[[Category:Lists]] | |||
Latest revision as of 05:24, 20 December 2023
The SNES has several registers which do not use all of their 8 bits. Some of them are:
| Common Name | Unused Bits |
|---|---|
| INIDISP | 4 - 6 |
| OAMADDH | 1 - 6 |
| VMAINC | 4 - 6 |
| M7SEL | 2 - 5 |
| WOBJLOG | 4 - 7 |
| TM | 5 - 7 |
| TS | 5 - 7 |
| TMW | 5 - 7 |
| TSW | 5 -7 |
| CGSWSEL | 2 - 3 |
| SETINI | 4 - 5 |
| STAT77 | 4 |
| STAT78 | 5 |
| WMADDH | 1 - 7 |
| NMITIMEN | 1 - 3 & 6 |
| HTIMEH | 1 - 7 |
| VTIMEH | 1 - 7 |
| MEMSEL | 1 - 7 |
| RDNMI | 4 - 6 |
| TIMEUP | 0 - 6 |
| HVBJOY | 1 - 5 |
| STD CTRL 1L | 0 - 3 |
| STD CTRL 2L | 0 - 3 |
| STD CTRL 3L | 0 - 3 |
| STD CTRL 4L | 0 - 3 |
| PMON | 0 |
Bits 10-12 of the Offset Change Mode data are unused. [1]
See Also
Reference
- Appendix A-13 of Book I of the official Super Nintendo development manual