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NOT1 (SPC700): Difference between revisions

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!colspan="8"|Flags Clobbered
!colspan="8"|Flags Clobbered
|+
|+
|N
|[[Negative Flag|N]]
|V
|[[Overflow Flag|V]]
|P
|[[Direct Page Flag|P]]
|B
|[[Break Flag|B]]
|H
|[[Half-Carry Flag|H]]
|I
|[[Interrupt Enable Flag|I]]
|Z
|[[Zero Flag|Z]]
|C
|[[Carry Flag|C]]
|+
|+
|.
|.

Revision as of 05:04, 27 November 2023

Basic Info
Addressing Mode Opcode Length Speed
13-bit Absolute EA 3 byte 5 cycles
Flags Clobbered
N V P B H I Z C
. . . . . . . .

NOT1 is an SPC700 instruction that performs a complement of a bit. The low 13 bits of the operand specify an absolute address. The high 3 bits of the operand specify which bit at that absolute address.

See Also

External Links