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PLD: Difference between revisions

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'''PLD''' (PulL Direct page) is a [[65c816]] instruction that pulls the 16-bit value at the top of the [[stack]] into the [[direct page register]].
'''PLD''' (PulL Direct page) is a [[65c816]] instruction that pulls the 16-bit value at the top of the [[stack]] into the [[direct page register]].  The low byte of this register is pulled first.  After PLD completes, the [[stack pointer]] is pointing to where the high byte was, which becomes the next available stack location.


=== See Also ===
=== See Also ===
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* [[PLX]]
* [[PLX]]
* [[PLY]]
* [[PLY]]
* [[TCD]]


=== External Links ===
=== External Links ===
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[[Category:65c816 additions]]
[[Category:65c816 additions]]
[[Category:Pull Instructions]]
[[Category:Pull Instructions]]
[[Category:Five-cycle Instructions]]

Latest revision as of 03:43, 19 December 2023

Basic Info
Addressing Mode Opcode Length Speed
Stack (Pull) 2B 1 byte 5 cycles
Flags Affected
N V M X D I Z C
. . . . . .

PLD (PulL Direct page) is a 65c816 instruction that pulls the 16-bit value at the top of the stack into the direct page register. The low byte of this register is pulled first. After PLD completes, the stack pointer is pointing to where the high byte was, which becomes the next available stack location.

See Also

External Links