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PLX: Difference between revisions

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=== External Links ===
=== External Links ===
* [[Eyes & Lichty]] page on PLX: https://archive.org/details/0893037893ProgrammingThe65816/page/n513
* [[Eyes & Lichty]] page 487, on PLX: https://archive.org/details/0893037893ProgrammingThe65816/page/n513
* [[Labiak]] page on PLX: https://archive.org/details/Programming_the_65816/page/n181
* [[Labiak]] page on PLX: https://archive.org/details/Programming_the_65816/page/n181
* snes9x implementation of PLX: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2156
* snes9x implementation of PLX: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2156

Revision as of 08:32, 20 November 2023

Basic Info
Addressing Mode Opcode Length Speed
Stack FA 1 byte 4 cycles*
Flags Affected
N V M X D I Z C
. . . . . .

PLX (PulL X) is a 65x instruction that pulls the value at the top of the stack into the X index register. PLX takes one additional cycle if the index registers are 16 bits wide.

See Also

External Links