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SEC: Difference between revisions

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* [[MCS6500 Manual]] page on SEC: https://archive.org/details/mos_microcomputers_programming_manual/page/n39
* [[MCS6500 Manual]] page on SEC: https://archive.org/details/mos_microcomputers_programming_manual/page/n39
* [[Carr]] page on SEC: https://archive.org/details/6502UsersManual/page/n285
* [[Carr]] page on SEC: https://archive.org/details/6502UsersManual/page/n285
* [[Leventhal]] page on SEC: https://archive.org/details/6502-assembly-language-programming/page/n142
* [[Leventhal]] page 3-93 on SEC: https://archive.org/details/6502-assembly-language-programming/page/n142
* snes9x implementation of SEC: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1427
* snes9x implementation of SEC: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1427



Revision as of 08:46, 4 December 2023

Basic Info
Addressing Mode Opcode Length Speed
Implied (type 2) 38 1 byte 2 cycles
Flags Affected
N V M X D I Z C
. . . . . . . 1

SEC is a 65x instruction that sets the carry flag.

Similar to doing a CLC before an ADC, it is recommended to run SEC (or otherwise make sure the carry flag is set) before running a SBC so that the difference is correct.

See Also

External Links