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SPC700/Waitstates: Difference between revisions

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This table shows how many [[waitstate]]s the [[internal cycle]]s of all the SPC700 opcodes have.
This table shows how many [[waitstate]]s the [[internal cycle]]s of all the [[SPC700]] opcodes have.


{| class="wikitable"
{| class="wikitable"
!  !!  !!  !!  !!  !!  !!  !!  !!  !!  !!  !!  !!  !!  !!  !!  !!  !!  !!  !!  !!  !!  !!  !!  !!  !!  !!  !!  !!  !!  !!  !!  !!
|-
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| 00..1F || 0 || 3 || 0 || 1 || 0 || 0 || 0 || 1 || 0 || 0 || 1 || 0 || 0 || 1 || 0 || 2 || 2 || 3 || 0 || 3 || 1 || 1 || 1 || 1 || 0 || 0 || 0 || 1 || 0 || 0 || 0 || 1
!    !! x0 !! x1 !! x2 !! x3 !! x4 !! x5 !! x6 !! x7 !! x8 !! x9 !! xA !! xB !! xC !! xD !! xE !! xF
|-
|-
| 20..3F || 0 || 3 || 0 || 1 || 0 || 0 || 0 || 1 || 0 || 0 || 1 || 0 || 0 || 1 || 3 || 2 || 0 || 3 || 0 || 3 || 1 || 1 || 1 || 1 || 0 || 0 || 0 || 1 || 0 || 0 || 0 || 3
| 0x || 0 || 3 || 0 || 1 || 0 || 0 || 0 || 1 || 0 || 0 || 1 || 0 || 0 || 1 || 0 || 2
|-
|-
| 40..5F || 0 || 3 || 0 || 1 || 0 || 0 || 0 || 1 || 0 || 0 || 0 || 0 || 0 || 1 || 0 || 3 || 2 || 3 || 0 || 3 || 1 || 1 || 1 || 1 || 0 || 0 || 0 || 1 || 0 || 0 || 0 || 0
| 1x || 2 || 3 || 0 || 3 || 1 || 1 || 1 || 1 || 0 || 0 || 0 || 1 || 0 || 0 || 0 || 1
|-
|-
| 60..7F || 0 || 3 || 0 || 1 || 0 || 0 || 0 || 1 || 0 || 1 || 0 || 0 || 0 || 1 || 2 || 1 || 0 || 3 || 0 || 3 || 1 || 1 || 1 || 1 || 1 || 1 || 1 || 1 || 0 || 0 || 0 || 1
| 2x || 0 || 3 || 0 || 1 || 0 || 0 || 0 || 1 || 0 || 0 || 1 || 0 || 0 || 1 || 3 || 2
|-
|-
| 80..9F || 0 || 3 || 0 || 1 || 0 || 0 || 0 || 1 || 0 || 0 || 1 || 0 || 0 || 0 || 1 || 0 || 2 || 3 || 0 || 3 || 1 || 1 || 1 || 1 || 0 || 0 || 1 || 1 || 0 || 0 || 10 || 3
| 3x || 0 || 3 || 0 || 3 || 1 || 1 || 1 || 1 || 0 || 0 || 0 || 1 || 0 || 0 || 0 || 3
|-
|-
| A0..BF || 1 || 3 || 0 || 1 || 0 || 0 || 0 || 1 || 0 || 0 || 0 || 0 || 0 || 0 || 1 || 1 || 0 || 3 || 0 || 3 || 1 || 1 || 1 || 1 || 0 || 0 || 1 || 1 || 0 || 0 || 1 || 1
| 4x || 0 || 3 || 0 || 1 || 0 || 0 || 0 || 1 || 0 || 0 || 0 || 0 || 0 || 1 || 0 || 3
|-
|-
| C0..DF || 1 || 3 || 0 || 1 || 0 || 0 || 0 || 1 || 0 || 0 || 1 || 0 || 0 || 0 || 1 || 7 || 2 || 3 || 0 || 3 || 1 || 1 || 1 || 1 || 0 || 1 || 0 || 1 || 0 || 0 || 4 || 1
| 5x || 2 || 3 || 0 || 3 || 1 || 1 || 1 || 1 || 0 || 0 || 0 || 1 || 0 || 0 || 0 || 0
|-
|-
| E0..FF || 0 || 3 || 0 || 1 || 0 || 0 || 0 || 1 || 0 || 0 || 0 || 0 || 0 || 1 || 1 || 0 || 0 || 3 || 0 || 3 || 1 || 1 || 1 || 1 || 0 || 1 || 0 || 1 || 0 || 0 || 3 || 0
| 6x || 0 || 3 || 0 || 1 || 0 || 0 || 0 || 1 || 0 || 1 || 0 || 0 || 0 || 1 || 2 || 1
|-
| 7x || 0 || 3 || 0 || 3 || 1 || 1 || 1 || 1 || 1 || 1 || 1 || 1 || 0 || 0 || 0 || 1
|-
| 8x || 0 || 3 || 0 || 1 || 0 || 0 || 0 || 1 || 0 || 0 || 1 || 0 || 0 || 0 || 1 || 0
|-
| 9x || 2 || 3 || 0 || 3 || 1 || 1 || 1 || 1 || 0 || 0 || 1 || 1 || 0 || 0 || 10 || 3
|-
| Ax || 1 || 3 || 0 || 1 || 0 || 0 || 0 || 1 || 0 || 0 || 0 || 0 || 0 || 0 || 1 || 1
|-
| Bx || 0 || 3 || 0 || 3 || 1 || 1 || 1 || 1 || 0 || 0 || 1 || 1 || 0 || 0 || 1 || 1
|-
| Cx || 1 || 3 || 0 || 1 || 0 || 0 || 0 || 1 || 0 || 0 || 1 || 0 || 0 || 0 || 1 || 7
|-
| Dx || 2 || 3 || 0 || 3 || 1 || 1 || 1 || 1 || 0 || 1 || 0 || 1 || 0 || 0 || 4 || 1
|-
| Ex || 0 || 3 || 0 || 1 || 0 || 0 || 0 || 1 || 0 || 0 || 0 || 0 || 0 || 1 || 1 || 0
|-
| Fx || 0 || 3 || 0 || 3 || 1 || 1 || 1 || 1 || 0 || 1 || 0 || 1 || 0 || 0 || 3 || 0
|}
|}
=== See Also ===
* [[WS1 Area]]
* [[WS2 Area]]


=== Reference ===
=== Reference ===
* https://problemkaputt.de/fullsnes.htm#snesapuspc700ioports
* https://problemkaputt.de/fullsnes.htm#snesapuspc700ioports


[[Category:SNES Hardware]]
[[Category:Audio]]
[[Category:Audio]]
[[Category:Timing]]

Latest revision as of 03:09, 17 July 2023

This table shows how many waitstates the internal cycles of all the SPC700 opcodes have.

x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF
0x 0 3 0 1 0 0 0 1 0 0 1 0 0 1 0 2
1x 2 3 0 3 1 1 1 1 0 0 0 1 0 0 0 1
2x 0 3 0 1 0 0 0 1 0 0 1 0 0 1 3 2
3x 0 3 0 3 1 1 1 1 0 0 0 1 0 0 0 3
4x 0 3 0 1 0 0 0 1 0 0 0 0 0 1 0 3
5x 2 3 0 3 1 1 1 1 0 0 0 1 0 0 0 0
6x 0 3 0 1 0 0 0 1 0 1 0 0 0 1 2 1
7x 0 3 0 3 1 1 1 1 1 1 1 1 0 0 0 1
8x 0 3 0 1 0 0 0 1 0 0 1 0 0 0 1 0
9x 2 3 0 3 1 1 1 1 0 0 1 1 0 0 10 3
Ax 1 3 0 1 0 0 0 1 0 0 0 0 0 0 1 1
Bx 0 3 0 3 1 1 1 1 0 0 1 1 0 0 1 1
Cx 1 3 0 1 0 0 0 1 0 0 1 0 0 0 1 7
Dx 2 3 0 3 1 1 1 1 0 1 0 1 0 0 4 1
Ex 0 3 0 1 0 0 0 1 0 0 0 0 0 1 1 0
Fx 0 3 0 3 1 1 1 1 0 1 0 1 0 0 3 0

See Also

Reference

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