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STP: Difference between revisions
From SnesLab
(note about PHI2 clock) |
(STP existed on the 65c02) |
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Revision as of 23:25, 7 May 2023
STP (Stop the processor) is an instruction that halts the CPU, putting it into a low power state until it is reset. The PHI2 clock is held high.
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| implied | DB | 1 byte | 3 cycles | ||||
| Flags Clobbered | |||||||
|---|---|---|---|---|---|---|---|
| N | V | M | X | D | I | Z | C |
| . | . | . | . | . | . | . | . |