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STP: Difference between revisions

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(type 3 admode)
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=== See Also ===
=== See Also ===
* [[WAI]]
* [[WAI]]
* [[STOP]]


=== External Links ===
=== External Links ===

Revision as of 01:04, 19 July 2023

Basic Info
Addressing Mode Opcode Length Speed
implied (type 3) DB 1 byte 3 cycles
Flags Clobbered
N V M X D I Z C
. . . . . . . .

STP (SToP-the-clock)[1] is an instruction that halts the CPU, putting it into a low power state until it is reset. The PHI2 clock is held high.

See Also

External Links

References

  1. Although "Stop The Processor" fits, all the letters in this mnemonic are from the word "stop." See row 58 of Table 5-1, "Instruction Set Table" on Page 21 of the official 65c02 datasheet: https://www.westerndesigncenter.com/wdc/documentation/w65c02s.pdf