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XCE: Difference between revisions
From SnesLab
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[[Category:65c816 additions]] | [[Category:65c816 additions]] | ||
[[Category:Exchange Instructions]] | [[Category:Exchange Instructions]] | ||
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[[Category:Two-cycle Instructions]] | |||
Latest revision as of 11:52, 14 December 2023
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Implied (type 2) | FB | 1 byte | 2 cycles | ||||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| N | V | M | X | D | I | Z | C | E |
| . | . | . | . | . | ||||
XCE is an instruction that exchanges the carry and emulation bits. It typically appears soon after the Reset Vector following a CLC, to switch the S-CPU into 65c816 native mode.
See Also
External Links
- Eyes & Lichty page 525, on XCE: https://archive.org/details/0893037893ProgrammingThe65816/page/n551
- Labiak page 205 on XCE: https://archive.org/details/Programming_the_65816/page/n215
- snes9x implementation of XCE: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2517
- undisbeliever on XCE: https://undisbeliever.net/snesdev/65816-opcodes.html#xce-exchange-carry-and-emulation-bits