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XCE: Difference between revisions

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=== External Links ===
* [[Eyes & Lichty]] page on XCE: https://archive.org/details/0893037893ProgrammingThe65816/page/n551


[[Category:ASM]]
[[Category:ASM]]
[[Category:65c816 additions]]
[[Category:65c816 additions]]

Revision as of 23:08, 15 May 2023

XCE is an instruction that exchanges the carry and emulation bits. It typically appears soon after the Reset Vector following a CLC, to switch the S-CPU into 65c816 native mode.

Basic Info
Addressing Mode Opcode Length Speed
implied FB 1 byte 2 cycles
Flags Clobbered
N V M X D I Z C E
. . . . .

External Links