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XCE: Difference between revisions

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'''XCE''' is an instruction that exchanges the [[carry]] and [[emulation]] bits.  It typically appears soon after the [[Reset Vector]] following a [[CLC]], to switch the [[S-CPU]] into [[65c816 native mode]].
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'''XCE''' is an instruction that exchanges the [[carry]] and [[emulation]] bits.  It typically appears soon after the [[Reset Vector]] following a [[CLC]], to switch the [[S-CPU]] into [[65c816 native mode]].


=== External Links ===
=== External Links ===

Revision as of 17:13, 13 July 2023

Basic Info
Addressing Mode Opcode Length Speed
implied FB 1 byte 2 cycles
Flags Clobbered
N V M X D I Z C E
. . . . .

XCE is an instruction that exchanges the carry and emulation bits. It typically appears soon after the Reset Vector following a CLC, to switch the S-CPU into 65c816 native mode.

External Links