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SEX (Super FX)
From SnesLab
(Redirected from GSU/SEX)
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | ROM Speed | RAM Speed | Cache Speed | ||
| Implied (type 1) | 95 | 1 byte | 3 cycles | 3 cycles | 1 cycle | ||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| B | ALT1 | ALT2 | O/V | S | CY | Z | ||
| 0 | 0 | 0 | . | S | . | Z | ||
SEX is a Super FX instruction that performs a sign extension of an 8-bit value. Bit 7 (the sign of the lower 8 bits) of the source register is copied into all the bits in the high byte of the destination register. The low byte of the source register is copied directly into the low byte of the destination register.
The ALT0 state is restored.
The source and destination registers should be specified in advance using WITH, FROM, or TO. Otherwise, R0 serves as the default.
Syntax
SEX
Example
Let:
Sreg : R5 Dreg : R1 R5 : 9284h
After executing SEX:
R1 = ff84h
See Also
External Links
- Official Nintendo documentation on SEX: paragraph 9.80 on page 2-9-110 of Book II
- example: page 2-9-111, lbid.