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PLD: Difference between revisions

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{| class="wikitable" style="float:right;clear:right;width:30%"
{| class="wikitable" style="float:right;clear:right;width:30%"
!colspan="9"|Flags Clobbered
!colspan="9"|Flags Affected
|+
|+
|N
|N

Revision as of 20:54, 19 November 2023

Basic Info
Addressing Mode Opcode Length Speed
stack 2B 1 byte 5 cycles
Flags Affected
N V M X D I Z C
. . . . . .

PLD (PulL Direct page) is a 65c816 instruction that pulls the 16-bit value at the top of the stack into the direct page register.

See Also

External Links