We've just updated MediaWiki and its underlying software. If anything doesn't look or work quite right, please mention it to us. --RanAS
ROR: Difference between revisions
From SnesLab
(clobbered -> affected) |
(additional cycles) |
||
| Line 15: | Line 15: | ||
|6E | |6E | ||
|3 bytes | |3 bytes | ||
|6 cycles | |6 cycles* | ||
|+ | |+ | ||
|direct page | |direct page | ||
|66 | |66 | ||
|2 bytes | |2 bytes | ||
|5 cycles | |5 cycles* | ||
|+ | |+ | ||
|absolute indexed by X | |absolute indexed by X | ||
|7E | |7E | ||
|3 bytes | |3 bytes | ||
|7 cycles | |7 cycles* | ||
|+ | |+ | ||
|direct page indexed by X | |direct page indexed by X | ||
|76 | |76 | ||
|2 bytes | |2 bytes | ||
|6 cycles | |6 cycles* | ||
|} | |} | ||
| Line 55: | Line 55: | ||
|} | |} | ||
'''ROR''' (Rotate Right) is a 65x instruction that rotates a value and the [[carry flag]] right one bit. The least significant bit is shifted into the carry flag. The carry flag is shifted into the most significant bit. | '''ROR''' (Rotate Right) is a 65x instruction that rotates a value and the [[carry flag]] right one bit. The least significant bit is shifted into the carry flag. The carry flag is shifted into the most significant bit. Except in [[accumulator addressing]], ROR takes two extra cycles when the accumulator is 16 bits wide. | ||
=== See Also === | === See Also === | ||
Revision as of 23:58, 19 November 2023
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| accumulator | 6A | 1 byte | 2 cycles | ||||
| absolute | 6E | 3 bytes | 6 cycles* | ||||
| direct page | 66 | 2 bytes | 5 cycles* | ||||
| absolute indexed by X | 7E | 3 bytes | 7 cycles* | ||||
| direct page indexed by X | 76 | 2 bytes | 6 cycles* | ||||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| N | V | M | X | D | I | Z | C | |
| . | . | . | . | . | ||||
ROR (Rotate Right) is a 65x instruction that rotates a value and the carry flag right one bit. The least significant bit is shifted into the carry flag. The carry flag is shifted into the most significant bit. Except in accumulator addressing, ROR takes two extra cycles when the accumulator is 16 bits wide.
See Also
External Links
- Eyes & Lichty page on ROR: https://archive.org/details/0893037893ProgrammingThe65816/page/n517
- Labiak page on ROR: https://archive.org/details/Programming_the_65816/page/n185
- MCS6500 Manual page on ROR: https://archive.org/details/mos_microcomputers_programming_manual/page/n171
- Carr page on ROR: https://archive.org/details/6502UsersManual/page/n282
- Leventhal page on ROR: https://archive.org/details/6502-assembly-language-programming/page/n136
- snes9x implementation of ROR: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1070
- undisbeliever on ROR: https://undisbeliever.net/snesdev/65816-opcodes.html#ror-rotate-right