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STZ: Difference between revisions
From SnesLab
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Revision as of 20:43, 22 November 2023
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Absolute | 9C | 3 bytes | 4 cycles* | ||||
| Direct Page | 64 | 2 bytes | 3 cycles* | ||||
| absolute indexed X | 9E | 3 bytes | 5 cycles* | ||||
| direct page indexed X | 74 | 2 bytes | 4 cycles* | ||||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| N | V | M | X | D | I | Z | C | |
| . | . | . | . | . | . | . | . | |
STZ (Store Zero) is a 65c816 instruction that zeros out memory.
Cycle Penalties
- STZ takes one additional cycle if the accumulator is 16 bits wide, in all addressing modes.
- In direct page addressing modes only, STZ takes another additional cycle if the low byte of the direct page register is nonzero.
See Also
External Links
- Eyes & Lichty page 507, on STZ: https://archive.org/details/0893037893ProgrammingThe65816/page/n533
- Labiak page on STZ: https://archive.org/details/Programming_the_65816/page/n198
- snes9x implementation of STZ: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1317
- undisbeliever on STZ: https://undisbeliever.net/snesdev/65816-opcodes.html#stz-store-zero-to-memory