BIT

Basic Info
Addressing Mode	Opcode	Length	Speed
Immediate	89	2 bytes*	2 cycles*
Absolute	2C	3 bytes	4 cycles*
Direct Page	24	2 bytes	3 cycles*
absolute indexed X	3C	3 bytes	4 cycles*
direct page indexed X	34	2 bytes	4 cycles*

Flags Affected
Addressing Mode	N	V	M	X	D	I	Z	C
Immediate	.	.	.	.	.	.		.
other			.	.	.	.		.

BIT is a 65x instruction that performs a logical AND operation between the accumulator and memory without storing the conjunction.

Cycle Penalties

• BIT takes an extra cycle when the accumulator is 16 bits wide, in all addressing modes
• In direct page addressing modes, BIT takes an extra cycle when the low byte of the direct page register is nonzero
• In Absolute Indexed, X Addressing, BIT takes an extra cycle when adding the index crosses a page boundary

See Also

• AND

External Links

• Eyes & Lichty page 431, on BIT: https://archive.org/details/0893037893ProgrammingThe65816/page/n457
• Labiak page on BIT: https://archive.org/details/Programming_the_65816/page/n131
• MCS6500 Manual page on BIT: https://archive.org/details/mos_microcomputers_programming_manual/page/n62
• Carr page on BIT: https://archive.org/details/6502UsersManual/page/n262
• Leventhal page on BIT: https://archive.org/details/6502-assembly-language-programming/page/n94
• snes9x implementation of BIT: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L265
• undisbeliever on BIT: https://undisbeliever.net/snesdev/65816-opcodes.html#bit-test-memory-bits-against-accumulator