SBK (Super FX): Difference between revisions

Latest revision as of 08:03, 28 November 2023


Basic Info
Opcode	Length	ROM Speed	RAM Speed	Cache Speed
90	1 byte	3 to 8 cycles	7 to 11 cycles	1 to 6 cycles


Flags Affected
B	ALT1	ALT2	O/V	S	CY	Z
0	0	0	.	.	.	.

SBK is a Super FX instruction that uses Bulk Processing. It stores the value in the source register to the address in the ram address cache.

@@ Line 1: / Line 1: @@
-'''SBK''' is a [[Super FX]] instruction that uses bulk processing.
+{| class="wikitable" style="float:right;clear:right;width:50%"
+!colspan="8"|Basic Info
+|+
+|'''Opcode'''
+|'''Length'''
+|'''ROM Speed'''
+|'''RAM Speed'''
+|'''Cache Speed'''
+|+
+|90
+|1 byte
+|3 to 8 cycles
+|7 to 11 cycles
+|1 to 6 cycles
+|}
+{| class="wikitable" style="float:right;clear:right;width:30%"
+!colspan="9"|Flags Affected
+|+
+|B
+|[[ALT1]]
+|[[ALT2]]
+|[[O/V]]
+|S
+|[[CY]]
+|Z
+|+
+|0
+|0
+|0
+|.
+|.
+|.
+|.
+|}
+'''SBK''' is a [[Super FX]] instruction that uses [[Bulk Processing]]. It stores the value in the [[source register]] to the address in the [[Ram Address Cache (Super FX)|ram address cache]].
+=== External Links ===
+* Official Super Nintendo development manual on SBK: [https://archive.org/details/SNESDevManual/book2/page/n265 Page 2-9-109 of Book II]
 [[Category:ASM]]
-[[Category:Enhancement Chips]]
+[[Category:Super FX]]
+[[Category:Data Transfer Instructions]]
+[[Category:One-byte Instructions]]