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EOR1 (SPC700): Difference between revisions
From SnesLab
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Revision as of 11:33, 28 November 2023
Basic Info | |||||||
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Addressing Mode | Opcode | Length | Speed | ||||
13-bit Absolute | 8A | 3 bytes | 5 cycles |
Flags Affected | |||||||
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N | V | P | B | H | I | Z | C |
. | . | . | . | . | . | . |
EOR1 is an SPC700 instruction that performs an exclusive or between a memory bit and the carry flag and stores the sum in the carry flag. The low 13 bits of the operand specify an absolute address. The high 3 bits of the operand specify which bit at that absolute address.
See Also
External Links
- Official Super Nintendo development manual on EOR1: Table C-18 in Appendix C-9 of Book I