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Control Register: Difference between revisions
From SnesLab
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The '''Control Register''' exists on the [[S-SMP]] and is 8 bits wide. It lives at 00F1h. | The '''Control Register''' exists on the [[S-SMP]] and is 8 bits wide. It lives at 00F1h. Bits 0,1,2,4, and 5 are cleared upon reset. | ||
=== See Also === | === See Also === | ||
Revision as of 03:48, 17 December 2023
The Control Register exists on the S-SMP and is 8 bits wide. It lives at 00F1h. Bits 0,1,2,4, and 5 are cleared upon reset.
See Also
Reference
- page 3-4-1 of Book II of the official Super Nintendo development manual