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FMULT (Super FX): Difference between revisions

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(8-bit multiplier)
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'''FMULT''' is a [[Super FX]] instruction that performs a signed multiplication.  The two factors are the [[source register]] and R<sub>6</sub>.  The upper 16 bits of the 32-bit product are stored in the [[destination register]].  Bit 15 of the product is stored in [[CY]].  The lower 15 bits of the product appear to be discarded.
'''FMULT''' is a [[Super FX]] instruction that performs a signed multiplication.  The two factors are the [[source register]] and R<sub>6</sub>.  The upper 16 bits of the 32-bit product are stored in the [[destination register]].  Bit 15 of the product is stored in [[CY]].  The lower 15 bits of the product appear to be discarded.


The exact speed depends on the state of the [[CFGR]] register.
The exact speed depends on the state of the [[CFGR]] register. FMULT utilizes the 8-bit multiplier four times.<sup>[3]</sup>


R<sub>4</sub> cannot serve as the destination register.
R<sub>4</sub> cannot serve as the destination register.
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=== External Links ===
=== External Links ===
* Official Nintendo documentation on FMULT: [https://archive.org/details/SNESDevManual/book2/page/n202 Page 2-9-46 of Book II]
# Official Nintendo documentation on FMULT: [https://archive.org/details/SNESDevManual/book2/page/n202 Page 2-9-46 of Book II]
* example: [https://archive.org/details/SNESDevManual/book2/page/n203 page 2-9-47], lbid.
# example: [https://archive.org/details/SNESDevManual/book2/page/n203 page 2-9-47], lbid.
# https://archive.org/details/SNESDevManual/book2/page/n155
 


[[Category:ASM]]
[[Category:ASM]]

Revision as of 12:13, 22 December 2023

Basic Info
Opcode Length ROM Speed RAM Speed Cache Speed
9F 1 byte 7 or 11 cycles 7 or 11 cycles 4 or 8 cycle
Flags Affected
B ALT1 ALT2 O/V S CY Z
0 0 0 .

FMULT is a Super FX instruction that performs a signed multiplication. The two factors are the source register and R6. The upper 16 bits of the 32-bit product are stored in the destination register. Bit 15 of the product is stored in CY. The lower 15 bits of the product appear to be discarded.

The exact speed depends on the state of the CFGR register. FMULT utilizes the 8-bit multiplier four times.[3]

R4 cannot serve as the destination register.

See Also

External Links

  1. Official Nintendo documentation on FMULT: Page 2-9-46 of Book II
  2. example: page 2-9-47, lbid.
  3. https://archive.org/details/SNESDevManual/book2/page/n155