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ASR (Super FX): Difference between revisions
From SnesLab
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!colspan="9"|Flags Affected | !colspan="9"|Flags Affected | ||
|+ | |+ | ||
|B | |[[B Flag|B]] | ||
|[[ALT1]] | |[[ALT1]] | ||
|[[ALT2]] | |[[ALT2]] | ||
Revision as of 17:05, 30 June 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Opcode | Length | ROM Speed | RAM Speed | Cache Speed | |||
| 96 | 1 byte | 3 cycles | 3 cycles | 1 cycle | |||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| B | ALT1 | ALT2 | O/V | S | CY | Z | ||
| 0 | 0 | 0 | . | |||||
ASR (Arithmetic Shift Right) is a Super FX instruction that shifts all bits of the source register's value to the right one bit while also leaving the most significant bit unchanged, storing the result in the destination register. Bit 0 is shifted into CY.
See Also
External Links
- Official Nintendo documentation on ASR: Page 2-9-12 of Book II
- example: page 2-9-13 of Book II, lbid.