We've just updated MediaWiki and its underlying software. If anything doesn't look or work quite right, please mention it to us. --RanAS
MERGE (Super FX): Difference between revisions
From SnesLab
(implied admode) |
(see also HIB/LOB) |
||
| Line 43: | Line 43: | ||
The official documentation has several bits labeled "B" not 'D" below the "Flags affected" table.<sup>[1]</sup> | The official documentation has several bits labeled "B" not 'D" below the "Flags affected" table.<sup>[1]</sup> | ||
=== See Also === | |||
* [[HIB]] | |||
* [[LOB]] | |||
=== External Links === | === External Links === | ||
Revision as of 19:31, 2 July 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | ROM Speed | RAM Speed | Cache Speed | ||
| Implied (type 1) | 70 | 1 byte | 3 cycles | 3 cycles | 1 cycle | ||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| B | ALT1 | ALT2 | O/V | S | CY | Z | ||
| 0 | 0 | 0 | ||||||
MERGE is a Super FX instruction that merges the high byte of two registers into the destination register.
The high byte of Dreg comes from R7. The low byte of Dreg comes from R8.
The official documentation has several bits labeled "B" not 'D" below the "Flags affected" table.[1]
See Also
External Links
- Official Nintendo documentation on MERGE: paragraph 9.56 on page 2-9-79 of Book II
- example: page 2-9-80 of Book II, lbid.