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CLR1 (SPC700): Difference between revisions
From SnesLab
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* [[TCLR1]] | * [[TCLR1]] | ||
* [[RMB]] | * [[RMB]] | ||
* [[dip bit]] | |||
=== External Links === | === External Links === |
Revision as of 03:27, 8 July 2024
Basic Info | |||||||
---|---|---|---|---|---|---|---|
Addressing Mode | Opcode | Length | Speed | ||||
Direct Page Bit | 12 | 2 bytes | 4 cycles | ||||
Direct Page Bit | 32 | 2 bytes | 4 cycles | ||||
Direct Page Bit | 52 | 2 bytes | 4 cycles | ||||
Direct Page Bit | 72 | 2 bytes | 4 cycles | ||||
Direct Page Bit | 92 | 2 bytes | 4 cycles | ||||
Direct Page Bit | B2 | 2 bytes | 4 cycles | ||||
Direct Page Bit | D2 | 2 bytes | 4 cycles | ||||
Direct Page Bit | F2 | 2 bytes | 4 cycles |
Flags Affected | |||||||
---|---|---|---|---|---|---|---|
N | V | P | B | H | I | Z | C |
. | . | . | . | . | . | . | . |
CLR1 is an SPC700 command that clears a bit in a direct page byte. The byte following the opcode determines which byte. The most significant 3 bits of the opcode determines which bit within that byte.
No flags are affected.
Syntax
CLR1 dip. bit
See Also
External Links
- Official Nintendo documentation on CLR1: Table C-18 in Appendix C-9 of Book I
- subparagraph 8.2.3.1 of page 3-8-8, lbid.